Search Results - "Yoo, Kwisung"

A 2.1 M Pixels, 120 Frame/s CMOS Image Sensor With Column-Parallel \Delta \Sigma ADC Architecture by Chae, Youngcheol, Cheon, Jimin, Lim, Seunghyun, Kwon, Minho, Yoo, Kwisung, Jung, Wunki, Lee, Dong-Hun, Ham, Seogheon, Han, Gunhee

“…This paper presents a 2.1 M pixel, 120 frame/s CMOS image sensor with column-parallel delta-sigma (ΔΣ) ADC architecture. The use of a second-order ΔΣ ADC…”
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A 240-frames/s 2.1-Mpixel CMOS Image Sensor With Column-Shared Cyclic ADCs by LIM, Seunghyun, CHEON, Jimin, CHAE, Youngcheol, JUNG, Wunki, LEE, Dong-Hun, KWON, Minho, YOO, Kwisung, HAM, Seogheon, HAN, Gunhee

“…This paper proposes a low-power 240 frames/s 2.1 M-pixel CMOS image sensor with column-shared cyclic (CY) ADCs. Two-column shared CY-ADC architecture and…”
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A Low-Power Gigabit CMOS Limiting Amplifier Using Negative Impedance Compensation and Its Application by HAN, Jungwon, YOO, Kwisung, LEE, Dongmyung, PARK, Kangyeop, OH, Wonseok, PARK, Sung Min

“…This paper presents a low-power, gigabit limiting amplifier (LA) for application to optical receivers that employ the negative impedance compensation technique…”
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A 2.1Mpixel 120frame/s CMOS image sensor with column-parallel ΔΣ ADC architecture by Youngcheol Chae, Jimin Cheon, Seunghyun Lim, Dongmyung Lee, Minho Kwon, Kwisung Yoo, Wunki Jung, Dong-Hun Lee, Seogheon Ham, Gunhee Han

“…A 2.1 Mpixel 120 frame/s CMOS image sensor with column-parallel ΔΣ ADCs is realized in a 0.13 μm CMOS process. Column-parallel ΔΣ ADC architectures improve the…”
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Convergence analysis of the cascade second-order adaptive line equalizer by Kwisung Yoo, Han, G., Hongil Yoon

“…The high-speed data transmission on a twisted pair cable suffers from frequency-dependent loss that causes significant inter-symbol interference. Although a…”
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Code-width testing-based compact ADC BIST circuit by Dongmyung Lee, Kwisung Yoo, Kicheol Kim, Han, G., Sungho Kang

“…This paper proposes a new analog-to-digital converter (ADC) built-in self-test (BIST) scheme based on code-width and sample-difference testing that does not…”
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A 2.1 M Pixels, 120 Frame/s CMOS Image Sensor With Column-Parallel ΔΣ ADC Architecture by CHAE, Youngcheol, CHEON, Jimin, LIM, Seunghyun, KWON, Minho, YOO, Kwisung, JUNG, Wunki, LEE, Dong-Hun, HAM, Seogheon, HAN, Gunhee

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A 1/1.33-inch 108Mpixel CMOS Image Sensor with 0.8um unit NONACELL pixels by Jung, Jaejin, Lim, Sinhwan, Kim, Jiyong, Yoo, Kwisung, Choi, Wontak, Oh, Youngsun, Ko, Juhyun, Koh, Kyoungmin

“…This paper presents a 1/1.33-inch 108Mp (megapixel) CMOS image sensor (CIS) for mobile applications. It is a 3D-stacked CIS designed with 0. 8um unit pixels…”
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A 2.1 M Pixels, 120 Frame/s CMOS Image Sensor With Column-Parallel [Formula Omitted] ADC Architecture by Chae, Youngcheol, Cheon, Jimin, Lim, Seunghyun, Kwon, Minho, Yoo, Kwisung, Jung, Wunki, Lee, Dong-Hun, Ham, Seogheon, Han, Gunhee

“…This paper presents a 2.1 M pixel, 120 frame/s CMOS image sensor with column-parallel delta-sigma [Formula Omitted] ADC architecture. The use of a second-order…”
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A 2.1 M Pixels, 120 Frame/s CMOS Image Sensor With Column-Parallel Delta capital sigma ADC Architecture by Chae, Youngcheol, Cheon, Jimin, Lim, Seunghyun, Kwon, Minho, Yoo, Kwisung, Jung, Wunki, Lee, Dong-Hun, Ham, Seogheon, Han, Gunhee

“…This paper presents a 2.1 M pixel, 120 frame/s CMOS image sensor with column-parallel delta-sigma ( Delta capital sigma ) ADC architecture. The use of a…”
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A 5.2-mW, 2.5-Gb/s Limiting Amplifer for OC-48 SONET Applications by Kwisung Yoo, Gunhee Han, Sung Min Park

“…In this paper, a fully differential CMOS limiting amplifier is presented for OC-48 SONET applications. With negative resistance and capacitance…”
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An adaptation method for FIR pre-emphasis filter on backplane channel by Kwisung Yoo, Gunhee Han

“…Ultra high-speed data transmission on a backplane suffers from inter-symbol interference (ISI), which degrades bit error rate (BER) performance. In order to…”
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A low power CMOS adaptive line equalizer for fast Ethernet by Kwisung Yoo, Hoon Lee, Gunhee Han

“…An analog adaptive line equalizer has been developed for 155 Mbps fast Ethernet data communication up to 100 m UTP (unshielded twisted pair) cable. The…”
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A 0.8 μm Nonacell for 108 Megapixels CMOS Image Sensor with FD-Shared Dual Conversion Gain and 18,000e- Full-Well Capacitance by Oh, Youngsun, Kim, Munhwan, Choi, Wonchul, Choi, Hana, Jeon, Honghyun, Seok, Junho, Choi, Yujung, Jung, Jaejin, Yoo, Kwisung, Park, Donghyuk, Kim, Yitae, Koh, Kyung-min, Lee, Jesuk, Moon, Chang-Rok, Ahn, JungChak

“…A 0.8μm-pitch 108 megapixels (Mp) ultrahigh-resolution CMOS image sensor has been demonstrated for mobile applications. The Nonacell was developed through a…”
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Convergence Analysis of the Cascaded 2nd Order Dual Servo Loop Adaptive Line Equalizer by Yoo, Kwisung, Han, Gunhee

“…The transmission of high-speed data on a cable suffers from frequency-dependent loss that causes significant inter symbol interference. Although a 1st order…”
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A 1.2V 5.2mW 40dB 2.5Gb/s Limiting Amplifier in 0.18μm CMOS Using Negative-Impedance Compensation by Yoo, Kwisung, Lee, Dongmyung, Han, Gunhee, Park, Sung Min, Oh, Won Seok

“…A 2.5Gb/s limiting amplifier is realized in a standard 0.18μm CMOS process, exploiting the negative-impedance compensation technique. Measurements show 2.5Gb/s…”
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CMOS image sensor with analog gamma correction using nonlinear single-slope ADC by Seogheon Ham, Yonghee Lee, Wunki Jung, Seunghyun Lim, Kwisung Yoo, Youngcheol Chae, Jihyun Cho, Dongmyung Lee, Gunhee Han

“…A human eye has the logarithmic response over wide range of light intensity. Although the gain can be set high to identify details in darker area on the image,…”
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