Search Results - "Yoo, In Kyeong"
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Physical electro-thermal model of resistive switching in bi-layered resistance-change memory
Published in Scientific reports (22-04-2013)“…Tantalum-oxide-based bi-layered resistance-change memories (RRAMs) have recently improved greatly with regard to their memory performances. The formation and…”
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2
Electrical Manipulation of Nanofilaments in Transition-Metal Oxides for Resistance-Based Memory
Published in Nano letters (08-04-2009)“…The fabrication of controlled nanostructures such as quantum dots, nanotubes, nanowires, and nanopillars has progressed rapidly over the past 10 years…”
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A plasma-treated chalcogenide switch device for stackable scalable 3D nanoscale memory
Published in Nature communications (16-10-2013)“…Stackable select devices such as the oxide p-n junction diode and the Schottky diode (one-way switch) have been proposed for non-volatile unipolar resistive…”
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4
HfZrOx-Based Ferroelectric Synapse Device With 32 Levels of Conductance States for Neuromorphic Applications
Published in IEEE electron device letters (01-06-2017)“…We propose a HfZrO x (HZO)-based ferroelectric synapse device with multi-levels states of remnant polarization that is equivalent to multi-levels conductance…”
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Improved Endurance of HfO2-Based Metal- Ferroelectric-Insulator-Silicon Structure by High-Pressure Hydrogen Annealing
Published in IEEE electron device letters (01-07-2019)“…We investigate the effects of high-pressure hydrogen annealing (HPHA) on W/ferroelectric Al:HfO 2 /interface layer (IL)/Si stacks. With HPHA, degradation in…”
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A fast, high-endurance and scalable non-volatile memory device made from asymmetric Ta2O5−x/TaO2−x bilayer structures
Published in Nature materials (01-08-2011)“…Numerous candidates attempting to replace Si-based flash memory have failed for a variety of reasons over the years. Oxide-based resistance memory and the…”
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A New Operating Scheme by Switching the Polarity of Program/Erase Bias for Partially Oxidized Amorphous-Si-Based Charge-Trap Memory
Published in IEEE transactions on electron devices (01-11-2006)“…In this brief, the authors propose a new program/erase (P/E) scheme for NAND-type partially oxidized amorphous-Si (a-Si)-based charge-trap memory in which the…”
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High threshold voltage p-GaN gate power devices on 200 mm Si
Published in 2013 25th International Symposium on Power Semiconductor Devices & IC's (ISPSD) (01-05-2013)“…In this paper, we present high threshold voltage, low on-resistance, and high speed GaN-HEMT devices using a p-GaN layer in the gate stack. There are three…”
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Conference Proceeding -
9
Two Series Oxide Resistors Applicable to High Speed and High Density Nonvolatile Memory
Published in Advanced materials (Weinheim) (19-11-2007)“…A memory cell consisting of a Pt/VO2/Pt switch element and a Pt/NiO/Pt memory element connected in series. By applying a voltage higher than Vth of 0.6 V, the…”
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HfZrO x -Based Ferroelectric Synapse Device With 32 Levels of Conductance States for Neuromorphic Applications
Published in IEEE electron device letters (01-06-2017)“…We propose a HfZrO x (HZO)-based ferroelectric synapse device with multi-levels states of remnant polarization that is equivalent to multi-levels conductance…”
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11
Multibit memories using a structure of SiO2/partially oxidized amorphous Si∕HfO2
Published in Applied physics letters (17-07-2006)“…Memory capacitors with a structure of SiO2/partially oxidized amorphous Si (a-Si)/HfO2 have been prepared by sequential processes: atomic layer deposition…”
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12
A Low-Temperature-Grown Oxide Diode as a New Switch Element for High-Density, Nonvolatile Memories
Published in Advanced materials (Weinheim) (08-01-2007)“…A one‐diode/one‐resistor structure, Pt/NiO/Pt/p‐NiOx/n‐TiOx/Pt, has been fabricated. This novel structure exhibits bistable resistance switching under forward…”
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Multi-level switching of triple-layered TaOx RRAM with excellent reliability for storage class memory
Published in 2012 Symposium on VLSI Technology (VLSIT) (01-06-2012)“…A highly reliable RRAM with multi-level cell (MLC) characteristics were fabricated using a triple-layer structure (base layer/oxygen exchange layer/barrier…”
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Conference Proceeding -
14
Write Current Reduction in Transition Metal Oxide Based Resistance Change Memory
Published in Advanced materials (Weinheim) (05-03-2008)“…A novel memory cell structure with a Pt/Ti‐doped NiO/Pt architecture is shown to exhibit the lowest write current reported thus far for a unipolar switching…”
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Bi-layered RRAM with unlimited endurance and extremely uniform switching
Published in 2011 Symposium on VLSI Technology - Digest of Technical Papers (01-06-2011)“…We demonstrate resistive random access memory (RRAM) architecture with bi-layered switching element for reliable resistive switching memory. Based on the…”
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Conference Proceeding -
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Investigation of pyroelectric electron emission from monodomain lithium niobate single crystals
Published in Physica. B, Condensed matter (01-09-2006)“…The behaviors of thermally stimulated electron emission from pyroelectric monodomain lithium niobate single crystal (LiNbO 3) were investigated by utilizing a…”
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Resistance-switching characteristics of polycrystalline Nb2O5 for nonvolatile memory application
Published in IEEE electron device letters (01-05-2005)Get full text
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18
Performance of threshold switching in chalcogenide glass for 3D stackable selector
Published in 2013 Symposium on VLSI Technology (01-06-2013)“…The nature of threshold switching (TS) in AsTeGeSiN-based selector devices is comprehensively investigated. The scaling of the AC response is limited up to 5…”
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Conference Proceeding -
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Decrease in switching voltage fluctuation of Pt∕NiOx∕Pt structure by process control
Published in Applied physics letters (09-07-2007)“…Resistance change random access memory devices using NiOx films with resistance switching properties have immense potential for high-density nonvolatile memory…”
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A Simple Device Unit Consisting of All NiO Storage and Switch Elements for Multilevel Terabit Nonvolatile Random Access Memory
Published in ACS applied materials & interfaces (23-11-2011)“…Present charge-based silicon memories are unlikely to reach terabit densities because of scaling limits. As the feature size of memory shrinks to just tens of…”
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