Search Results - "Yongsun Lee"

Ultra-thin Hf0.5Zr0.5O2 thin-film-based ferroelectric tunnel junction via stress induced crystallization by Goh, Youngin, Hwang, Junghyeon, Lee, Yongsun, Kim, Minki, Jeon, Sanghun

“…We report on 4.5-nm-thick Hf0.5Zr0.5O2 (HZO) thin-film-based ferroelectric tunnel junctions (FTJs) with a tungsten (W) bottom electrode. The HZO on the W…”
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A Low-Jitter and Low-Reference-Spur Ring-VCO-Based Switched-Loop Filter PLL Using a Fast Phase-Error Correction Technique by Lee, Yongsun, Seong, Taeho, Yoo, Seyeon, Choi, Jaehyouk

“…A low-jitter and low-reference-spur ring-type voltage-controlled oscillator (VCO)-based switched-loop filter (SLF) phase-locked loop (PLL) is presented. To…”
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A Low-Integrated-Phase-Noise 27-30-GHz Injection-Locked Frequency Multiplier With an Ultra-Low-Power Frequency-Tracking Loop for mm-Wave-Band 5G Transceivers by Yoo, Seyeon, Choi, Seojin, Kim, Juyeop, Yoon, Heein, Lee, Yongsun, Choi, Jaehyouk

“…An ultra-low-phase-noise injection-locked frequency multiplier (ILFM) for millimeter wave (mm-wave) fifth-generation transceivers is presented. Using an…”
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Comparison of Single- and Multilocus Genetic Diversity in the Protozoan Parasites Cryptosporidium parvum and C. hominis by Widmer, Giovanni, Lee, Yongsun

“…The genotyping of numerous isolates of Cryptosporidium parasites has led to the definition of new species and a better understanding of the epidemiology of…”
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A Low Phase Noise Injection-Locked Programmable Reference Clock Multiplier With a Two-Phase PVT-Calibrator for \Delta\Sigma PLLs by Lee, Yongsun, Kim, Mina, Seong, Taeho, Choi, Jaehyouk

“…A low phase noise injection-locked reference clock multiplier that can suppress the delta-sigma (ΔΣ) noise of ΔΣ phase-locked loops (PLLs) is proposed. By…”
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An External Capacitor-Less Ultralow-Dropout Regulator Using a Loop-Gain Stabilizing Technique for High Power-Supply Rejection Over a Wide Range of Load Current by Lim, Younghyun, Lee, Jeonghyun, Lee, Yongsun, Song, Seong-Sik, Kim, Hong-Teuk, Lee, Ockgoo, Choi, Jaehyouk

“…An external capacitor-less ultra low-dropout (LDO) regulator that can continue to provide high power-supply rejection (PSR) over a wide range of the load…”
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A 0.56-2.92 GHz Wideband and Low Phase Noise Quadrature LO-Generator Using a Single LC-VCO for 2G-4G Multistandard Cellular Transceivers by Yoon, Heein, Lee, Yongsun, Lim, Younghyun, Tak, Geum-Young, Kim, Hong-Teuk, Ho, Yo-Chuol, Choi, Jaehyouk

“…A wideband and low phase noise quadrature local oscillation (LO) signal generator for multistandard cellular transceivers was proposed. Using the new LO-plan…”
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A −242dB FOM and −75dBc-reference-spur ring-DCO-based all-digital PLL using a fast phase-error correction technique and a low-power optimal-threshold TDC by Taeho Seong, Yongsun Lee, Seyeon Yoo, Jaehyouk Choi

“…To improve efficiency in the use of silicon, there have been many efforts to develop ring-oscillator-based clock generators with low jitter. A PLL using a fast…”
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A −31dBc integrated-phase-noise 29GHz fractional-N frequency synthesizer supporting multiple frequency bands for backward-compatible 5G using a frequency doubler and injection-locked frequency multipliers by Heein Yoon, Juyeop Kim, Suneui Park, Younghyun Lim, Yongsun Lee, Jooeun Bang, Kyoohyun Lim, Jaehyouk Choi

“…To address the increasing demand for high-bandwidth mobile communications, 5G technology is targeted to support data-rates up to 10Gb/s. To reach this goal,…”
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Ultralow In-Band Phase Noise Injection-Locked Frequency Multiplier Design Based on Open-Loop Frequency Calibration by Seong, Taeho, Lee, Yongsun, Choi, Jaehyouk

“…A new design methodology is proposed for an ultralow in-band phase noise injection-locked frequency multiplier (ILFM) based on open-loop frequency calibration…”
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16.2 A 76fsrms Jitter and -40dBc Integrated-Phase-Noise 28-to-31GHz Frequency Synthesizer Based on Digital Sub-Sampling PLL Using Optimally Spaced Voltage Comparators and Background Loop-Gain Optimization by Kim, Juyeop, Yoon, Heein, Lim, Younghyun, Lee, Yongsun, Cho, Yoonseo, Seong, Taeho, Choi, Jaehyouk

“…The generation of mm-wave (mmW) signals that have ultra-low phase noise (PN) is very important for the design of RF transceivers (TRXs) for high-data-rate 5G…”
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The Influence of Top and Bottom Metal Electrodes on Ferroelectricity of Hafnia by Lee, Yongsun, Goh, Youngin, Hwang, Junghyeon, Das, Dipjyoti, Jeon, Sanghun

“…In recent years, several experimental approaches have been adopted to study and understand the mechanism and improve the ferroelectricity of fluorite-type…”
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Selector-less Ferroelectric Tunnel Junctions by Stress Engineering and an Imprinting Effect for High-Density Cross-Point Synapse Arrays by Goh, Youngin, Hwang, Junghyeon, Kim, Minki, Lee, Yongsun, Jung, Minhyun, Jeon, Sanghun

“…In the quest for highly scalable and three-dimensional (3D) stackable memory components, ferroelectric tunnel junction (FTJ) crossbar architectures are…”
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A 320-fs RMS Jitter and - 75-dBc Reference-Spur Ring-DCO-Based Digital PLL Using an Optimal-Threshold TDC by Seong, Taeho, Lee, Yongsun, Yoo, Seyeon, Choi, Jaehyouk

“…This paper presents a ring-type, digitally controlled oscillator (DCO)-based integer-<inline-formula> <tex-math notation="LaTeX">{N}…”
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A Low-Jitter and Low-Fractional-Spur Ring-DCO-Based Fractional-N Digital PLL Using a DTC's Second-/Third-Order Nonlinearity Cancellation and a Probability-Density-Shaping ΔΣM by Hwang, Chanwoong, Park, Hangi, Lee, Yongsun, Seong, Taeho, Choi, Jaehyouk

“…This work presents a low-jitter and low-spur, fractional-<inline-formula> <tex-math notation="LaTeX">N </tex-math></inline-formula> ring-oscillator-based…”
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An Ultra-Low-Jitter, mmW-Band Frequency Synthesizer Based on Digital Subsampling PLL Using Optimally Spaced Voltage Comparators by Kim, Juyeop, Lim, Younghyun, Yoon, Heein, Lee, Yongsun, Park, Hangi, Cho, Yoonseo, Seong, Taeho, Choi, Jaehyouk

“…This article presents a cascaded architecture of a frequency synthesizer to generate ultra-low-jitter output signals in a millimeter-wave (mmW) frequency band…”
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Relatively Low-k Ferroelectric Nonvolatile Memory Using Fast Ramping Fast Cooling Annealing Process by Hwang, Junghyeon, Kim, Minki, Jung, Minhyun, Kim, Taeho, Goh, Youngin, Lee, Yongsun, Jeon, Sanghun

“…Hafnia-based ferroelectric field-effect transistors (FeFETs) with low power, scalability, and nonvolatile switching can overcome the performance limitations of…”
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A Low-Jitter and Low-Reference-Spur Ring-VCO- Based Injection-Locked Clock Multiplier Using a Triple-Point Background Calibrator by Yoo, Seyeon, Choi, Seojin, Lee, Yongsun, Seong, Taeho, Lim, Younghyun, Choi, Jaehyouk

“…This work presents a low-jitter, low-reference-spur ring voltage-controlled oscillator (ring VCO)-based injection-locked clock multiplier (ILCM). Since the…”
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A PVT-robust −59-dBc reference spur and 450-fsRMS jitter injection-locked clock multiplier using a voltage-domain period-calibrating loop by Yongsun Lee, Heein Yoon, Mina Kim, Jaehyouk Choi

“…This paper presents a low-reference-spur and low-jitter injection-locked clock multiplier (ILCM). To secure these performances over PVT-variations, we propose…”
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Steep-Slope Transistor with an Imprinted Antiferroelectric Film by Lee, Sangho, Lee, Yongsun, Kim, Taeho, Kim, Giuk, Eom, Taehyong, Shin, Hunbeom, Jeong, Yeongseok, Jeon, Sanghun

“…The effect of negative capacitance (NC), which can internally boost the voltage applied to a transistor, has been considered to overcome the fundamental…”
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