Search Results - "Xue, Jason"

Refine Results
  1. 1

    Near-Free Lifetime Extension for 3-D nand Flash via Opportunistic Self-Healing by Ren, Tianyu, Li, Qiao, Lv, Yina, Ye, Min, Guan, Nan, Jason Xue, Chun

    “…3-D nand flash memories are the dominant storage media in modern data centers due to their high performance, large storage capacity, and low-power consumption…”
    Get full text
    Journal Article
  2. 2

    Exploiting Asymmetric Errors for LDPC Decoding Optimization on 3D NAND Flash Memory by Li, Qiao, Shi, Liang, Cui, Yufei, Xue, Chun Jason

    Published in IEEE transactions on computers (01-04-2020)
    “…By stacking layers vertically, the adoption of 3D NAND has significantly increased the capacity for storage systems. The complex structure of 3D NAND…”
    Get full text
    Journal Article
  3. 3

    Access Characteristic Guided Read and Write Regulation on Flash Based Storage Systems by Li, Qiao, Shi, Liang, Gao, Congming, Di, Yejia, Xue, Chun Jason

    Published in IEEE transactions on computers (01-12-2018)
    “…NAND flash memory is now used in various storage systems, such as embedded systems, personal computers, and web servers. The developments in bit density and…”
    Get full text
    Journal Article
  4. 4

    Minimizing Retention Induced Refresh Through Exploiting Process Variation of Flash Memory by Di, Yejia, Shi, Liang, Gao, Congming, Li, Qiao, Xue, Chun Jason, Wu, Kaijie

    Published in IEEE transactions on computers (01-01-2019)
    “…Refresh schemes have been the default approach in NAND flash memory to avoid data losses. The critical issue of the refresh schemes is that they introduce…”
    Get full text
    Journal Article
  5. 5

    DaTuM: Dynamic tone mapping technique for OLED display power saving based on video classification by Xiang Chen, Yiran Chen, Xue, Chun Jason

    “…The adoption of the latest OLED (organic light emitting diode) technology does not change the fact that screen is still one of the most energy-consuming…”
    Get full text
    Conference Proceeding
  6. 6

    Exploiting Parallelism for Access Conflict Minimization in Flash-Based Solid State Drives by Congming Gao, Liang Shi, Cheng Ji, Yejia Di, Kaijie Wu, Chun Jason Xue, Sha, Edwin H.-M

    “…Solid state drives (SSDs) have been widely deployed in personal computers, data centers, and cloud storages. In order to improve performance, SSDs are usually…”
    Get full text
    Journal Article
  7. 7

    Optimizing Scheduling and Intercluster Connection for Application-Specific DSP Processors by Cathy Qun Xu, Chun Jason Xue, Jingtong Hu, Sha, E.H.-M.

    Published in IEEE transactions on signal processing (01-11-2009)
    “…Signal processing applications have high instruction level parallelism (ILP) and real-time performance requirements. Embedded and application specific…”
    Get full text
    Journal Article
  8. 8

    Checkpointing-Aware Loop Tiling for Energy Harvesting Powered Nonvolatile Processors by Li, Fuyang, Qiu, Keni, Zhao, Mengying, Hu, Jingtong, Liu, Yongpan, Guan, Yong, Xue, Chun Jason

    “…As power failures often occur in energy harvesting powered nonvolatile processors (NVPs), checkpointing is needed during program execution. It is observed that…”
    Get full text
    Journal Article
  9. 9

    Dynamic localisation of mature microRNAs in Human nucleoli is influenced by exogenous genetic materials by Li, Zhou Fang, Liang, Yi Min, Lau, Pui Ngan, Shen, Wei, Wang, Dai Kui, Cheung, Wing Tai, Xue, Chun Jason, Poon, Lit Man, Lam, Yun Wah

    Published in PloS one (06-08-2013)
    “…Although microRNAs are commonly known to function as a component of RNA-induced silencing complexes in the cytoplasm, they have been detected in other…”
    Get full text
    Journal Article
  10. 10

    Thread Criticality Assisted Replication and Migration for Chip Multiprocessor Caches by Jianhua Li, Minming Li, Xue, Chun Jason, Yiming Ouyang, Fanfan Shen

    Published in IEEE transactions on computers (01-10-2017)
    “…Non-Uniform Cache Architecture (NUCA) is a viable solution to mitigate the problem of large on-chip wire delay due to the rapid increase in the cache capacity…”
    Get full text
    Journal Article
  11. 11

    Optimized address assignment with array and loop transformations for minimizing schedule length by Chun Jason Xue, Zhiping Jia, Zili Shao, Meng Wang, Sha, E.H.-M.

    “…Reducing address arithmetic operations by optimization of address offset assignment greatly improves the performance of digital signal processor (DSP)…”
    Get full text
    Journal Article
  12. 12

    DVFS-Based Long-Term Task Scheduling for Dual-Channel Solar-Powered Sensor Nodes by Wu, Tongda, Liu, Yongpan, Zhang, Daming, Li, Jinyang, Hu, Xiaobo Sharon, Xue, Chun Jason, Yang, Huazhong

    “…Solar-powered sensor nodes (SCSNs) with energy storages have the greatest potential and are widely used in the coming era of the Internet of Things, since they…”
    Get full text
    Journal Article
  13. 13

    Minimizing Access Cost for Multiple Types of Memory Units in Embedded Systems Through Data Allocation and Scheduling by Qingfeng Zhuge, Yibo Guo, Jingtong Hu, Wei-Che Tseng, Xue, S. J., Sha, E. H-M

    Published in IEEE transactions on signal processing (01-06-2012)
    “…Software-controlled memories, such as scratch-pad memory (SPM), have been widely adopted in many digital signal processors to achieve high performance with low…”
    Get full text
    Journal Article
  14. 14

    Task Allocation on Nonvolatile-Memory-Based Hybrid Main Memory by Wanyong Tian, Yingchao Zhao, Liang Shi, Qingan Li, Jianhua Li, Xue, C. J., Minming Li, Enhong Chen

    “…In this paper, we consider the task allocation problem on a hybrid main memory composed of nonvolatile memory (NVM) and dynamic random access memory (DRAM)…”
    Get full text
    Journal Article
  15. 15

    Loop scheduling and bank type assignment for heterogeneous multi-bank memory by Qiu, Meikang, Guo, Minyi, Liu, Meiqin, Xue, Chun Jason, Yang, Laurence T., Sha, Edwin H.-M.

    “…Many high-performance DSP processors employ multi-bank on-chip memory to improve performance and energy consumption. This architectural feature supports higher…”
    Get full text
    Journal Article
  16. 16

    Wear-Leveling Aware Page Management for Non-Volatile Main Memory on Embedded Systems by Chen Pan, Shouzhen Gu, Mimi Xie, Yongpan Liu, Xue, Jason, Jingtong Hu

    “…Non-volatile Memories (NVMs), have many promising characteristics, such as low leakage power, low cost, non-volatility, and high scalability, which are all…”
    Get full text
    Journal Article
  17. 17
  18. 18

    Joint task assignment and cache partitioning with cache locking for WCET minimization on MPSoC by Liu, Tiantian, Zhao, Yingchao, Li, Minming, Xue, Chun Jason

    “…Cache locking technique is often utilized to guarantee a tighter prediction of Worst-Case Execution Time (WCET) which is one of the most important performance…”
    Get full text
    Journal Article
  19. 19

    Sleep-aware mode assignment in wireless embedded systems by Yuan, Zhaohui, Zhang, Yuping, Xue, Chun Jason

    “…Minimizing energy consumption is a key issue in designing wireless embedded systems. While a lot of work has been done to manage energy consumption on single…”
    Get full text
    Journal Article
  20. 20

    Dual partitioning multicasting for high-performance on-chip networks by Li, Jianhua, Shi, Liang, Xue, Chun Jason, Xu, Yinlong

    “…As the number of cores integrated onto a single chip increases, power dissipation and network latency become ever-increasingly stringent. On-chip network…”
    Get full text
    Journal Article