Search Results - "Xipeng Shen"
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TADOC: Text analytics directly on compression
Published in The VLDB journal (01-03-2021)“…This article provides a comprehensive description of text analytics directly on compression (TADOC), which enables direct document analytics on compressed…”
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Journal Article -
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Serum CRP interacts with SPARC and regulate immune response in severe cases of COVID-19 infection
Published in Frontiers in immunology (2023)“…Serum C-reactive protein (CRP) has been found elevated during COVID-19 infection, and associated with systematic inflammation as well as a poor clinical…”
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Journal Article -
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Optimizing Data Placement on GPU Memory: A Portable Approach
Published in IEEE transactions on computers (01-03-2017)“…Modern GPUs feature complex memory system designs. One GPU may contain many types of memory of different properties. The best way to place data in memory is…”
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Journal Article -
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Free launch: Optimizing GPU dynamic kernel launches through thread reuse
Published in 2015 48th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO) (01-12-2015)“…Supporting dynamic parallelism is important for GPU to benefit a broad range of applications. There are currently two fundamental ways for programs to exploit…”
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Conference Proceeding -
5
Hypoxia induces alterations in tRNA modifications involved in translational control
Published in BMC biology (21-02-2023)“…Adaptation to high-altitude hypobaric hypoxia has been shown to require a set of physiological traits enabled by an associated set of genetic modifications, as…”
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A Machine Learning Based Ensemble Forecasting Optimization Algorithm for Preseason Prediction of Atlantic Hurricane Activity
Published in Atmosphere (01-04-2021)“…In this study, nine different statistical models are constructed using different combinations of predictors, including models with and without projected…”
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PORPLE: An Extensible Optimizer for Portable Data Placement on GPU
Published in 2014 47th Annual IEEE/ACM International Symposium on Microarchitecture (01-12-2014)“…GPU is often equipped with complex memory systems, including globalmemory, texture memory, shared memory, constant memory, and variouslevels of cache. Where to…”
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Conference Proceeding -
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Adhesive Calcium Alginate Networks Enable Robust Silver Nanowire Electrodes for Flexible Electronics
Published in Advanced devices & instrumentation (01-01-2024)“…Silver nanowires (AgNWs) deposited on plastic substrates show potential as electrodes for flexible electronics but face challenges due to high surface…”
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Sweet KNN: An Efficient KNN on GPU through Reconciliation between Redundancy Removal and Regularity
Published in 2017 IEEE 33rd International Conference on Data Engineering (ICDE) (01-04-2017)“…Finding the k nearest neighbors of a query point or a set of query points (KNN) is a fundamental problem in many application domains. It is expensive to do…”
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Conference Proceeding -
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POSTER: Cutting the Fat: Speeding Up RBM for Fast Deep Learning Through Generalized Redundancy Elimination
Published in 2017 26th International Conference on Parallel Architectures and Compilation Techniques (PACT) (01-09-2017)“…Restricted Boltzmann Machine (RBM) is the building block of Deep Belief Nets and other deep learning tools. Fast learning and prediction are both essential for…”
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Conference Proceeding -
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Enabling Portable Optimizations of Data Placement on GPU
Published in IEEE MICRO (01-07-2015)“…Modern GPU memory systems manifest more varieties, increasing complexities, and rapid changes. Different placements of data on memory systems often cause…”
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Journal Article -
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Reuse-Centric K-Means Configuration
Published in 2018 IEEE 34th International Conference on Data Engineering (ICDE) (01-04-2018)“…K-means configuration is a time-consuming process due to the iterative nature of k-means. This paper proposes reuse-centric k-means configuration to accelerate…”
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Conference Proceeding -
13
Analysis and approximation of optimal co-scheduling on Chip Multiprocessors
Published in 2008 International Conference on Parallel Architectures and Compilation Techniques (PACT) (25-10-2008)“…Cache sharing among processors is important for Chip Multiprocessors to reduce inter-thread latency, but also brings cache contention, degrading program…”
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Conference Proceeding -
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Alterations of RNA Modification in Mouse Germ Cell-2 Spermatids Under Hypoxic Stress
Published in Frontiers in molecular biosciences (14-06-2022)“…Hypoxia is a known stress factor in mammals and has been shown to potentially impair male fertility, which manifests as spermatogenic dysfunction and decreased…”
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Exploring hybrid memory for GPU energy efficiency through software-hardware co-design
Published in Proceedings of the 22nd International Conference on Parallel Architectures and Compilation Techniques (01-09-2013)“…Hybrid memory designs, such as DRAM plus Phase Change Memory (PCM), have shown some promise for alleviating power and density issues faced by traditional…”
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Conference Proceeding -
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POSTER: Bridging the Gap Between Deep Learning and Sparse Matrix Format Selection
Published in 2017 26th International Conference on Parallel Architectures and Compilation Techniques (PACT) (01-09-2017)“…In this work, we conduct a systematic exploration on the promise and challenges of deep learning for the sparse matrix format selection. We propose a set of…”
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Conference Proceeding -
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The Significance of CMP Cache Sharing on Contemporary Multithreaded Applications
Published in IEEE transactions on parallel and distributed systems (01-02-2012)“…Cache sharing on modern Chip Multiprocessors (CMPs) reduces communication latency among corunning threads, and also causes interthread cache contention. Most…”
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Understanding co-run performance on CPU-GPU integrated processors: observations, insights, directions
Published in Frontiers of Computer Science (01-02-2017)“…Recent years have witnessed a processor develop- ment trend that integrates central processing unit (CPU) and graphic processing unit (GPU) into a single chip…”
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The Complexity of Optimal Job Co-Scheduling on Chip Multiprocessors and Heuristics-Based Solutions
Published in IEEE transactions on parallel and distributed systems (01-07-2011)“…In Chip Multiprocessors (CMPs) architecture, it is common that multiple cores share some on-chip cache. The sharing may cause cache thrashing and contention…”
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Tuning for software analytics: Is it really necessary?
Published in Information and software technology (01-08-2016)“…Context: Data miners have been widely used in software engineering to, say, generate defect predictors from static code measures. Such static code defect…”
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