Search Results - "Wuerdig, Rodrigo N."

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  1. 1

    Pulsar: Constraining QDI Circuits Cycle Time Using Traditional EDA Tools by Sartori, Marcos L. L., Wuerdig, Rodrigo N., Moreira, Matheus T., Calazans, Ney L. V.

    “…Asynchronous quasi-delay-insensitive (QDI) circuits are known for their potentially enhanced robustness to PVT variations when compared to synchronous circuits…”
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    Conference Proceeding
  2. 2

    Leveraging QDI Robustness to Simplify the Design of IoT Circuits by Sartori, Marcos L. L., Wuerdig, Rodrigo N., Moreira, Matheus T., Bampi, Sergio, Calazans, Ney L. V.

    “…Internet of Things devices require innovative power efficient design techniques that ensure correct operation in harsh environments, where using synchronous…”
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    Conference Proceeding
  3. 3

    LEX - A Cell Switching Arcs Extractor: A Simple SPICE-Input Interface for Electrical Characterization by Wuerdig, Rodrigo N., Maciel, Vitor H., Reis, Ricardo, Bampi, Sergio

    “…The characterization of logic cells is a critical step in the design of digital circuits. Existing open-source cell characterization tools typically require…”
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    Conference Proceeding
  4. 4

    Designing a 9.3μW Low-Power Time-to-Digital Converter (TDC) for a Time Assisted SAR ADC by Wuerdig, Rodrigo N., Canal, Bruno, Balen, Tiago R., Bampi, Sergio

    “…The Time-to-Digital Converter (TDC) is an impor-tant circuit block for digitally quantifying the time displacement between digital events. Among several…”
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    Conference Proceeding
  5. 5

    AV1 Residual Syntax Elements Assessment and Efficient VLSI Architecture by Gomes, Jiovana Sousa, Wuerdig, Rodrigo N., Ramos, Fabio Luis Livi, Bampi, Sergio

    “…Video coding is an essential technology that has become increasingly important as video usage has boomed in recent years. Video coding formats, or codecs, are…”
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    Conference Proceeding
  6. 6

    RISC-V SoC Physical Implementation in 180 nm CMOS with a Quark Core Based on FemtoRV32 by Nascimento, Felipe F., Wuerdig, Rodrigo N., Ponchet, Andre F., Sanches, Bruno, Loubach, Denis S., D'Amore, Roberto, Junior, Marcus H. Victor, Oliveira, Walter S., Kuribara, Vitor O., Moreira, Luiz C.

    “…This article presents the first known physical implementation of a RISC-V core based on the FemtoRV32 project, using the Quark core to implement the RV32I…”
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    Conference Proceeding
  7. 7

    Evaluating Cell Library Sizing Methodologies for Ultra-Low Power Near-Threshold Operation in Bulk CMOS by Wuerdig, Rodrigo N., Lima, Vitor G., Baumgratz, Filipe, Soares, Rafael, Bampi, Sergio

    “…A systematic evaluation of different transistor sizing methodologies for near-threshold (NTV) operation of CMOS standard cell libraries is presented herein…”
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    Conference Proceeding
  8. 8

    Mitigating Asynchronous QDI Drawbacks on MAC Operators with Approximate Multipliers by Wuerdig, Rodrigo N., Sartori, Marcos L. L., Abreu, Brunno A., Bampi, Sergio, Calazans, Ney L. V.

    “…This work explores the use of asynchronous approximate multiply-accumulate (MAC) operators and research ways to alleviate the inherent area overhead of such…”
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    Conference Proceeding
  9. 9

    Asynchronous Quasi-Random Number Generator: Taking Advantage of PVT Variations by Wuerdig, Rodrigo N., Sartori, Marcos L. L., Calazans, Ney L. V.

    “…Random number generators find application in many fields, including cryptography, digital signatures and network equipment testers, to cite a few. Two main…”
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    Conference Proceeding