Search Results - "Wuerdig, Rodrigo N."
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Pulsar: Constraining QDI Circuits Cycle Time Using Traditional EDA Tools
Published in 2019 25th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC) (01-05-2019)“…Asynchronous quasi-delay-insensitive (QDI) circuits are known for their potentially enhanced robustness to PVT variations when compared to synchronous circuits…”
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Leveraging QDI Robustness to Simplify the Design of IoT Circuits
Published in 2020 IEEE International Symposium on Circuits and Systems (ISCAS) (01-10-2020)“…Internet of Things devices require innovative power efficient design techniques that ensure correct operation in harsh environments, where using synchronous…”
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LEX - A Cell Switching Arcs Extractor: A Simple SPICE-Input Interface for Electrical Characterization
Published in 2023 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) (20-06-2023)“…The characterization of logic cells is a critical step in the design of digital circuits. Existing open-source cell characterization tools typically require…”
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Designing a 9.3μW Low-Power Time-to-Digital Converter (TDC) for a Time Assisted SAR ADC
Published in 2022 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI) (22-08-2022)“…The Time-to-Digital Converter (TDC) is an impor-tant circuit block for digitally quantifying the time displacement between digital events. Among several…”
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AV1 Residual Syntax Elements Assessment and Efficient VLSI Architecture
Published in 2023 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI) (28-08-2023)“…Video coding is an essential technology that has become increasingly important as video usage has boomed in recent years. Video coding formats, or codecs, are…”
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RISC-V SoC Physical Implementation in 180 nm CMOS with a Quark Core Based on FemtoRV32
Published in 2023 IEEE Seventh Ecuador Technical Chapters Meeting (ECTM) (10-10-2023)“…This article presents the first known physical implementation of a RISC-V core based on the FemtoRV32 project, using the Quark core to implement the RV32I…”
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Evaluating Cell Library Sizing Methodologies for Ultra-Low Power Near-Threshold Operation in Bulk CMOS
Published in 2020 IEEE 11th Latin American Symposium on Circuits & Systems (LASCAS) (01-02-2020)“…A systematic evaluation of different transistor sizing methodologies for near-threshold (NTV) operation of CMOS standard cell libraries is presented herein…”
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Mitigating Asynchronous QDI Drawbacks on MAC Operators with Approximate Multipliers
Published in 2022 IEEE International Symposium on Circuits and Systems (ISCAS) (28-05-2022)“…This work explores the use of asynchronous approximate multiply-accumulate (MAC) operators and research ways to alleviate the inherent area overhead of such…”
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Asynchronous Quasi-Random Number Generator: Taking Advantage of PVT Variations
Published in 2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS) (01-02-2019)“…Random number generators find application in many fields, including cryptography, digital signatures and network equipment testers, to cite a few. Two main…”
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