Search Results - "Wu, Ephrem"

Advancing high performance heterogeneous integration through die stacking by Madden, L., Wu, Ephrem, Namhoon Kim, Banijamali, B., Abugharbieh, K., Ramalingam, S., Xin Wu

“…This paper describes the industry's first heterogeneous Stacked Silicon Interconnect (SSI) FPGA family (3D integration). Each device is housed in a…”
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MLPerf Inference Benchmark by Reddi, Vijay Janapa, Cheng, Christine, Kanter, David, Mattson, Peter, Schmuelling, Guenther, Wu, Carole-Jean, Anderson, Brian, Breughe, Maximilien, Charlebois, Mark, Chou, William, Chukka, Ramesh, Coleman, Cody, Davis, Sam, Deng, Pan, Diamos, Greg, Duke, Jared, Fick, Dave, Gardner, J. Scott, Hubara, Itay, Idgunji, Sachin, Jablin, Thomas B., Jiao, Jeff, John, Tom St, Kanwar, Pankaj, Lee, David, Liao, Jeffery, Lokhmotov, Anton, Massa, Francisco, Meng, Peng, Micikevicius, Paulius, Osborne, Colin, Pekhimenko, Gennady, Rajan, Arun Tejusve Raghunath, Sequeira, Dilip, Sirasao, Ashish, Sun, Fei, Tang, Hanlin, Thomson, Michael, Wei, Frank, Wu, Ephrem, Xu, Lingjie, Yamada, Koichi, Yu, Bing, Yuan, George, Zhong, Aaron, Zhang, Peizhao, Zhou, Yuchen

“…Machine-learning (ML) hardware and software system demand is burgeoning. Driven by ML applications, the number of different ML inference systems has exploded…”
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Learning Accurate Integer Transformer Machine-Translation Models by Wu, Ephrem

“…We describe a method for training accurate Transformer machine-translation models to run inference using 8-bit integer (INT8) hardware matrix multipliers, as…”
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Interconnect and package design of a heterogeneous stacked-silicon FPGA by Wu, Ephrem, Abugharbieh, Khaldoon, Banijamali, Bahareh, Ramalingam, Suresh, Wu, Paul, Wyland, Chris

“…This paper reviews the interconnect and package design of a heterogeneous stacked-silicon FPGA. Up to five dice from two die types are mounted on a passive…”
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Advancing high performance heterogeneous integration through die stacking by Madden, L., Wu, Ephrem, Namhoon Kim, Banijamali, B., Abugharbieh, K., Ramalingam, S., Xin Wu

“…This paper describes the industry's first heterogeneous Stacked Silicon Interconnect (SSI) FPGA family (3D integration). Each device is housed in a…”
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Optical backplanes with 3D integrated photonics? by Wu, Ephrem

“…This article consists of a collection of slides from the author's conference presentation on the deployment of optical backplanes with 3D integrated photonics…”
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A Data-Center FPGA Acceleration Platform for Convolutional Neural Networks by Yu, Xiaoyu, Gao, Jianlin, Wang, Yuwei, Miao, Jie, Wu, Ephrem, Zhang, Heng, Meng, Yu, Zhang, Bo, Min, Biao, Chen, Dewei

“…Intensive computation is entering data centers with multiple workloads of deep learning. To balance the compute efficiency, performance, and total cost of…”
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A high-throughput reconfigurable processing array for neural networks by Wu, Ephrem, Xiaoqian Zhang, Berman, David, Inkeun Cho

“…FPGA-based neural-networks typically leave performance on the table because the DSP resources run at less than a third of the peak clock rate. This paper…”
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FPGAs with 28Gb/s transceivers built with heterogeneous stacked-silicon interconnects by Wu, Ephrem, Ramalingam, Suresh

“…This article consists of a collection of slides from the author's conference presentation on Xilinx's field programmable gate arrays (FPGA) that deploy 28 Gb/s…”
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A Data-Center FPGA Acceleration Platform for Convolutional Neural Networks by Yu, Xiaoyu, Wang, Yuwei, Miao, Jie, Wu, Ephrem, Zhang, Heng, Meng, Yu, Zhang, Bo, Min, Biao, Chen, Dewei, Gao, Jianlin

“…Intensive computation is entering data centers with multiple workloads of deep learning. To balance the compute efficiency, performance, and total cost of…”
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MLPerf Inference Benchmark by Reddi, Vijay Janapa, Cheng, Christine, Kanter, David, Mattson, Peter, Schmuelling, Guenther, Wu, Carole-Jean, Anderson, Brian, Breughe, Maximilien, Charlebois, Mark, Chou, William, Chukka, Ramesh, Coleman, Cody, Davis, Sam, Deng, Pan, Diamos, Greg, Duke, Jared, Fick, Dave, Gardner, J. Scott, Hubara, Itay, Idgunji, Sachin, Jablin, Thomas B, Jiao, Jeff, John, Tom St, Kanwar, Pankaj, Lee, David, Liao, Jeffery, Lokhmotov, Anton, Massa, Francisco, Meng, Peng, Micikevicius, Paulius, Osborne, Colin, Pekhimenko, Gennady, Rajan, Arun Tejusve Raghunath, Sequeira, Dilip, Sirasao, Ashish, Sun, Fei, Tang, Hanlin, Thomson, Michael, Wei, Frank, Wu, Ephrem, Xu, Lingjie, Yamada, Koichi, Yu, Bing, Yuan, George, Zhong, Aaron, Zhang, Peizhao, Zhou, Yuchen

“…Machine-learning (ML) hardware and software system demand is burgeoning. Driven by ML applications, the number of different ML inference systems has exploded…”
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A framework for scaling future backplanes by Wu, Ephrem

“…As line interfaces in communications chassis transition to 100 Gb/s and higher per port, many in the industry question when electrical backplanes inside these…”
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Noise reduction using multi-frame motion estimation, with outlier rejection and trajectory correction by Iu, S.L., Wu, E.C.

“…A novel noise reduction (NR) system, MMOT-NR, is proposed. It consists of a multiframe block-based motion estimator which uses the least trimmed square (LTS)…”
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The Princeton University behavioral synthesis system by Wolf, W., Takach, A., Huang, C.-Y., Manno, R., Wu, E.

“…The Princeton University behavioral synthesis system (PUBSS) is a high-level synthesis system targeted to control-dominated machines. PUBSS compiles a very…”
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