Search Results - "Wittenburg, J.P."

A 1.3-GOPS parallel DSP for high-performance image-processing applications by Hinrichs, W., Wittenburg, J.P., Lieske, H., Kloos, H., Ohmacht, M., Pirsch, P.

“…A programmable digital signal processor (DSP) for real-time image processing is presented that combines the concepts of single-instruction multiple-data (SIMD)…”
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Realization of a programmable parallel DSP for high performance image processing applications by Wittenburg, Jens Peter, Hinrichs, Willm, Kneip, Johannes, Ohmacht, Martin, Bereković, Mladen, Lieske, Hanno, Kloos, Helge, Pirsch, Peter

“…Architecture and design of the HiPAR-DSP, a SIMD controlled signalprocessor with parallel data paths, VLIW and novel memory design.The processor architecture…”
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HiPAR-DSP 16, a scalable highly parallel DSP core for system on a chip video- and image processing applications by Kloos, H., Wittenburg, J.P., Hinrichs, W., Lieske, H., Friebe, L., Klar, C., Pirsch, P.

“…The presented HiPAR-DSP is a highly parallel DSP core for system on a chip video- and image processing applications. The architecture is based on an array of…”
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IT leverage for media acquisition: New paradigms in the key area of digital cinematography and HD production workflows by Brune, T., Kochale, A., Wittenburg, J.P.

“…This paper proposes the demonstration of a comprehensive novel acquisition infrastructure based on standard 10G Ethernet interface technology. This…”
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A high performance digital signal processor for compact realization of real-time synthetic aperture radar systems by Kloos, H., Wittenburg, J.P., Hinrichs, W., Lieske, H., Pirsch, P.

“…Modern SAR applications have a large amount of needed processing power. Most of the currently available architectures lack of flexibility or performance. In…”
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A multithreaded architecture approach to parallel DSPs for high performance image processing applications by Wittenburg, J.P., Pirsch, P., Meyer, G.

“…Starting from an evaluation of recent and future image processing algorithm's properties, this paper proposes a new class of parallel DSP architectures…”
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An algorithm adapted autonomous controlling concept for a parallel single-chip digital signal processor by Kneip, J., Wittenburg, J.P., Berekovic, M., Ronner, K., Pirsch, P.

“…The controlling concept of a parallel homogenous SIMD video signal processor has been derived from the requirements of data dependent image processing…”
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A 1.3 GOPS parallel DSP for high performance image processing applications by Hinrichs, W., Wittenburg, J.P., Lieske, H., Kloos, H., Ohmacht, M., Kneip, J., Ronner, K., Pirsch, P.

“…In this paper, a programmable DSP for real time image processing is presented that combines the concepts of VLIW and SIMD with a high utilization of parallel…”
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HiPAR-DSP 16: A parallel DSP for onboard real-time processing of synthetic aperture radar data by Kloos, H., Wittenburg, J.P., Hinrichs, W., Lieske, H., Friebe, L., Pirsch, P.

“…The authors present the HiPAR-DSP 16, a parallel and programmable architecture which is adapted to the demands of SAR image processing. To provide a high FFT…”
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Hipar-DSP-a scalable family of high performance DSP-cores by Wittenburg, J.P., Hinrichs, W., Lieske, H., Kloos, H., Friebe, L., Pirsch, P.

“…With the HiPAR-DSP family we present a scalable series of high performance fixed point DSPs. The HiPAR-DSP family features up to 16 SIMD controlled datapaths,…”
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A compact real-time SAR processing system using the highly parallel HiPAR-DSP 16 by Friebe, L., Kloos, H., Wittenburg, J.P., Hinrichs, W., Lieske, H., Klar, C., Pirsch, P.

“…At the Laboratorium fu/spl uml/r Informationstechnologie the HiPAR-DSP 16, a parallel digital signal processor (DSP) optimized for image processing algorithms,…”
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Parallel implementation of medium level algorithms on a monolithic ASIMD multiprocessor by Kneip, J., Ohmacht, M., Wittenburg, J.P., Pirsch, P.

“…The efficient implementation of algorithms with irregular data access or control-flow on a parallel SIMD processor requires specific architectural measures…”
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HiPAR-DSP: a parallel VLIW RISC processor for real time image processing applications by Wittenburg, J.P., Ohmacht, M., Kneip, J., Hinrichs, W., Pirsch, P.

“…Derived from a thorough analysis of a wide class of image processing algorithms' properties, a parallel RISC architecture has been developed. The architecture…”
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