Search Results - "Williams, Thomas W."

Opportunities and challenges for innovative and equitable healthcare by Ecker, David J., Aiello, Clarice D., Arron, Joseph R., Bennett, C. Frank, Bernard, Amy, Breakefield, Xandra O., Broderick, Timothy J., Callier, Shawneequa L., Canton, Barry, Chen, Janice S., Fishburn, C. Simone, Garrett, Banning, Hecht, Sidney M., Janowitz, Tobias, Kliegman, Melinda, Krainer, Adrian, Louis, Chrystal U., Lowe, Christopher, Sehgal, Alfica, Tozan, Yesim, Tracey, Kevin J., Urnov, Fyodor, Wattendorf, Daniel, Williams, Thomas W., Zhao, Xuanhe, Hayden, Michael R.

“…An unprecedented number of potentially disruptive therapeutic technologies are under development. Forward-looking policies, incentives and infrastructure are…”
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Aging and the Detection of Contingency in Causal Learning by Mutter, Sharon A, Williams, Thomas W

“…Young and older participants' ability to detect negative, random, and positive response-outcome contingencies was evaluated using both contingency estimation…”
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Dynamic scan: driving down the cost of test by Samaranayake, S., Sitchinava, N., Kapur, R., Amin, M.B., Williams, T.W.

“…Two factors primarily drive the soaring cost of semiconductor test: the number of test patterns applied to each chip and the time it takes to run each pattern…”
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Enhancing test efficiency for delay fault testing using multiple-clocked schemes by Jing-Jia Liou, Wang, L.-C., Kwang-Ting Cheng

“…In conventional delay testing, the test clock is a single pre-defined parameter that is often set to be the same as the system clock. This paper discusses the…”
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"The Contemporary Presidency": Postpresidential Influence in the Postmodern Era by Schaller, Thomas F., Williams, Thomas W.

“…How influential are former American presidents? Though entitled to salary, staff, and security, on leaving office ex-presidents lose all formal governing…”
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Tough challenges as design and test go nanometer by Kapur, R., Williams, T.W.

“…Test engineers are already hard pressed to ensure the quality of ICs despite ever shorter time to market and skyrocketing test costs. Nanometer technologies…”
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Enhancing test efficiency for delay fault testing using multiple-clocked schemes by Liou, Jing-Jia, Wang, Li-C., Cheng, Kwang-Ting, Dworak, Jennifer, Mercer, M. Ray, Kapur, Rohit, Williams, Thomas W.

“…In conventional delay testing, the test clock is a single pre-defined parameter that is often set to be the same as the system clock. This paper discusses the…”
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Analysis of delay test effectiveness with a multiple-clock scheme by Jing-Jia Liou, Wang, L.-C., Kwang-Ting Cheng, Dworak, J., Mercer, M.R., Kapur, R., Williams, T.W.

“…In conventional delay testing, two types of tests, transition tests and path delay tests, are often considered. The test clock frequency is usually set to a…”
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EDA to the Rescue of the Silicon Roadmap by Williams, T.W.

“…Summary form only given. Since the invention of the transistor, new technology nodes have been added approximately every two years. This march of progress has…”
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Music for Everybody by Williams, Thomas W.

“…“The goal of any worth-while community music program is to bring the total population in contact with some phase of music.” This statement which is developed…”
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The Contemporay Presidency: Postpresidential Influence in the Postmodern Era by SCHALLER, THOMAS F., WILLIAMS, THOMAS W.

“…How influential are former American presidents? Though entitled to salary, staff, and security, on leaving office ex‐presidents lose all formal governing…”
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Postpresidential influence in the postmodern era by Schaller, Thomas F, Williams, Thomas W

“…How influential are former American presidents? Though entitled to salary, staff, and security, on leaving office ex-presidents lose all formal governing…”
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EDA to the Rescue of the Silicon Roadmap by Williams, Thomas W.

“…Since the invention of the transistor nearly six decades ago, new technology nodes have been added approximately every two years. This march of progress has…”
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Historical Perspective on Scan Compression by Kapur, R., Mitra, S., Williams, T.W.

“…The beginnings of the modern-day IC test trace back to the introduction of such fundamental concepts as scan, stuck-at faults, and the D-algorithm. Since then,…”
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Design for testability-A survey by Williams, T.W., Parker, K.P.

“…This paper discusses the basics of design for testability. A short review of testing is given along with some reasons why one should test. The different…”
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TTTC recognizes test visionary's lifetime contribution by Williams, T.W.

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The total delay fault model and statistical delay fault coverage by Park, E.S., Mercer, M.R., Williams, T.W.

“…Delay testing at the operational system clock rate can detect system timing failures caused by delay faults. However, delay fault coverage in terms of the…”
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Bounds and analysis of aliasing errors in linear feedback shift registers by Williams, T.W., Daehn, W., Gruetzner, M., Starke, C.W.

“…Aliasing errors in linear feedback shift registers (LFSRs) used as signature analysis registers in self-testing networks are considered. A bound on aliasing is…”
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Using target faults to detect non-target defects by Wang, L., Mercer, M.R., Williams, T.W.

“…The traditional ATPG method relies upon faults to target all defects. Since faults do not model all possible defects, testing quality depends on the fortuitous…”
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Design for testability of analog/digital networks by Wagner, K.D., Williams, T.W.

“…The testing of analog/digital integrated circuits is difficult since they allow direct access to relatively few signals. Since the probing of component pins is…”
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