Search Results - "Walker, Duncan M. Hank"

Power supply noise control in pseudo functional test by Tengteng Zhang, Walker, Duncan M. Hank

“…Pseudo functional K Longest Path Per Gate (KLPG) test (PKLPG) is proposed to generate delay tests that test the longest paths while having power supply noise…”
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Topological Heuristics for Scan Test Overhead Reduction by Chakraborty, Avijit, Walker, D. M. H.

“…High test coverage is critical to manufacturing a competitive integrated circuit. Design-for-test infrastructure, however, increases the power-performance-area…”
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Improved power supply noise control for pseudo functional test by Tengteng Zhang, Walker, Duncan M. Hank

“…Differences in power supply noise (PSN) between functional and structural delay testing can lead to differences in chip operating frequencies of 30% or more…”
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I sub(DDQ) testing of bridging faults in logic resources of reconfigurable field programmable gate arrays by Zhao, Lan, Walker, Duncan M Hank, Lombardi, Fabrizio

“…This paper presents an I sub(DDQ)-based test strategy for detecting bridging faults in the logic resources of reprogrammable Field Programmable Gate Arrays…”
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Modeling Power Supply Noise in Delay Testing by Jing Wang, Walker, D.M., Xiang Lu, Majhi, A., Kruseman, B., Gronthoud, G., Villagra, L.E., van de Wiel, P.J.A., Eichenberger, S.

“…Excessive power supply noise during test can cause overkill. This article discusses two models for supply noise in delay testing and their application to test…”
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