Search Results - "Vimjam, V.C."
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Increasing the deducibility in CNF instances for efficient SAT-based bounded model checking
Published in Tenth IEEE International High-Level Design Validation and Test Workshop, 2005 (2005)“…In this paper, we propose low-cost static deduction techniques by combining binary resolution and static logic implications to efficiently extract invariant…”
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Conference Proceeding -
2
Explicit Safety Property Strengthening in SAT-based Induction
Published in 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems (VLSID'07) (01-01-2007)“…Strengthening a property allows it to be falsified/verified at an earlier induction depth. In this paper, we propose new preprocessing techniques for…”
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Conference Proceeding -
3
Efficient fault collapsing via generalized dominance relations
Published in 24th IEEE VLSI Test Symposium (2006)“…Fault collapsing of a fault-set helps in obtaining smaller test-sets as well as in reducing fault-simulation times. In this paper, we propose two new theorems…”
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Conference Proceeding -
4
Using Scan-Dump Values to Improve Functional-Diagnosis Methodology
Published in 25th IEEE VLSI Test Symposium (VTS'07) (01-05-2007)“…In this paper, we identify two main bottlenecks in the functional diagnosis flow and propose new ways to overcome these. Our approach completely eliminates the…”
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Conference Proceeding