Search Results - "Vierhaus, Heinrich T."

An Interactive Design Space Exploration Tool for Dependable Integrated Circuits by Scharoba, Stefan, Vierhaus, Heinrich T.

“…The downscaling of transistor feature sizes has led to integrated circuits that are more susceptible to various fault effects. In order to meet dependability…”
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Test of automotive embedded processors with high diagnostic resolution by Gleichner, Christian, Vierhaus, Heinrich T.

“…In state-of-the-art automotive controllers, functional tests are used to check their integrity in the field. Features dedicated to production test of…”
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Multiple fault testing in systems-on-chip with high-level decision diagrams by Ubar, Raimund, Oyeniran, Stephen Adeboye, Scholzel, Mario, Vierhaus, Heinrich T.

“…A new method of high level test generation based on the concept of test groups to prove the correctness of a part of system functionality is proposed…”
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A comprehensive software-based self-test and self-repair method for statically scheduled superscalar processors by Scholzel, Mario, Koal, Tobias, Muller, Sebastian, Scharoba, Stefan, Roder, Stephanie, Vierhaus, Heinrich T.

“…The integration of a diagnostic software-based self-test and a software-based self-repair method into a single statically scheduled superscalar processor is…”
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On reliability estimation for combined transient and permanent fault handling by Scharoba, Stefan, Scholzel, Mario, Koal, Tobias, Vierhaus, Heinrich T.

“…This paper addresses the problem of modeling the reliability of systems, where permanent and transient faults are handled in a combined manner. First, we…”
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On the feasibility of combining on-line-test and self repair for logic circuits by Koal, T., Ulbricht, M., Engelke, P., Vierhaus, H. T.

“…Integrated circuits and systems implemented by using nano-technologies show a combination of known and new faults effects, which affect their reliability and…”
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Test Data and Power Reductions for Transition Delay Tests for Massive-Parallel Scan Structures by Kothe, Rene, Vierhaus, Heinrich T

“…Test technologies for integrated circuits have traditionally tried to maximise test data compression rates, because these are essential for keeping test time…”
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Diagnostic self-test for dynamically scheduled superscalar processors based on reconfiguration techniques for handling permanent faults by Scholzel, Mario, Koal, Tobias, Vierhaus, Heinrich T.

“…Diagnostic self-test in-the-field for processors becomes mandatory for reconfigurable fault tolerant processor-based systems. Software-based self-test…”
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On the Feasibility of Built-In Self Repair for Logic Circuits by Koal, T., Scheit, D., Schölzel, M., Vierhaus, H. T.

“…According to recent investigations on fault mechanisms in nano-scale integrated circuits, they suffer from wear-out effects that limit their life time…”
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Fast power overhead prediction for hardware redundancy-based fault tolerance by Scharoba, Stefan, Vierhaus, Heinrich T.

“…Due to the downscaling of transistor feature sizes, nowadays integrated circuits are more vulnerable to various effects that can cause faults during operation…”
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Fault detection and self repair in Hsiao-code FEC circuits by Dicorato, Davide, Pfeifer, Petr, Vierhaus, Heinrich T.

“…Wireless signal transmission has become the essential core of modern communication systems. Forward error correction (FEC) has a critical role in securing…”
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Combining fault tolerance and self repair at minimum cost in power and hardware by Koal, Tobias, Scholzel, Mario, Vierhaus, Heinrich T.

“…Large-scale integrated circuits and systems fabricated in nano-technologies exhibit new and enhanced fault properties which limit both their reliability and…”
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Combining Correction of Delay Faults and Transient Faults by Koal, Tobias, Scharoba, Stefan, Vierhaus, Heinrich T.

“…The on-going down-scaling of devices in microelectronics has resulted both in reliability problems and in problems regarding power dissipation. Even worse,…”
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Systematic generation of diagnostic software-based self-test routines for processor components by Scholzel, Mario, Koal, Tobias, Vierhaus, Heinrich T.

“…Recently some fine-grained self-repair techniques for processors have been published that can handle permanent faults in particular components of a processor…”
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Compiler-Centred Microprocessor Design (CoMet) - From C-Code to a VHDL Model of an ASIP by Urban, Roberto, Scholzel, Mario, Vierhaus, Heinrich T., Altmann, Enrico, Seelig, Horst

“…This paper proposes a new approach on designing application specific instruction set processors (ASIP). The design process is driven by a step by step…”
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Advanced technical education in the age of cyber physical systems by Vierhaus, Heinrich T., Scholzel, Mario, Raik, Jaan, Ubar, Raimund

“…Technical education has to meet new challenges with the arrival of large-scale cyber physical systems. Since such systems are real-time critical, distributed,…”
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On performance estimation of a scalable VLIW soft-core on ALTERA and XILINX FPGA platforms by Pfeifer, Petr, Pliva, Zdenek, Scholzel, Mario, Koal, Tobias, Vierhaus, Heinrich T.

“…This paper presents performance estimations for a scalable VLIW soft-core implemented in various XILINX and ALTERA FPGAs. It covers the low-cost low-power…”
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Timing for virtual TMR in logic circuits by Müller, Sebastian, Koal, Tobias, Schölzel, Mario, Vierhaus, Heinrich T.

“…Digital integrated circuits fabricated in nano-technologies have first shown to be more vulnerable to transient errors effects than their predecessors. But…”
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A comprehensive scheme for logic self repair by Koal, Tobias, Scheit, Daniel, Vierhaus, Heinrich T.

“…Predictions for the properties of integrated circuits and systems fabricated in emerging nano-technologies indicate a rising level of static and dynamic faults…”
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Combining on-line fault detection and logic self repair by Koal, T., Ulbricht, M., Vierhaus, H. T.

“…In recent years many authors have addressed the growing vulnerability of nano-electronic circuits and systems to transient faults and wear-out effects. Hence…”
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