Search Results - "Venkateswarlu, S. China"

ECG performance validation using operational transconductance amplifier with bias current by Vijay, Vallabhuni, Reddy, C. V. Sai Kumar, Pittala, Chandra Shaker, Vallabhuni, Rajeev Ratna, Saritha, M., Lavanya, M., Venkateswarlu, S. China, Sreevani, M.

“…This paper presents an electrocardiogram amplifier with operational transconductance amplifier at 0.18 µm. Comb active filters are used for designing of…”
Get full text

Design of High-Performance Full Adder Using 20nm CNTFET Technology by Naveen, G., Rao, V.R Seshagiri, N, Nirmala, L, Pavan Kalyan, Vijay, Vallabhuni, Venkateswarlu, S. China, Vallabhuni, Rajeev Ratna

“…Full adder was also known as basic component in any digital circuitry for microprocessors, digital signal processors and for every processing chip used in…”
Get full text

A Wearable Health Monitoring System Using Arduino and IoT by Manasa, K., Venkateswarlu, S. China

“…In present days IoT plays an important role in the healthcare systems, remote health care monitoring has evolved at such a rapid pace, due to increased use of…”
Get full text

Speech Enhancement Using Recursive Least Square Based on Real-time adaptive filtering algorithm by Venkateswarlu, S.China, Kumar, Naluguru Udaya, Karthik, Annam

“…In real time environment a speech signal is often corrupted and losses its characteristics either by natural disturbances or anything. The key aim of our…”
Get full text

Biasing Techniques: Validation of 3 to 8 Decoder Modules Using 18nm FinFET Nodes by Pittala, Chandra Shaker, Lavanya, M., Saritha, M., Vijay, V., Venkateswarlu, S. China, Vallabhuni, Rajeev Ratna

“…In this research paper, we planned a low leakage power and high speed decoder for memory cluster application and proposed modern four strategies. In this…”
Get full text

Novel Methodology to Validate DUTs Using Single Access Structure by Pittala, Chandra Shaker, Sravana, J., Ajitha, G., Saritha, P., Khadir, Mohammad, Vijay, V., Venkateswarlu, S. China, Vallabhuni, Rajeev Ratna

“…Conventional shift-based scan chains have the drawback of peak power consumption which is reduced by the proposed single cycle access test structure for logic…”
Get full text

Energy Efficient Decoder Circuit Using Source Biasing Technique in CNTFET Technology by Pittala, Chandra Shaker, Lavanya, M., Vijay, V., Reddy, Y. V. J. C., Venkateswarlu, S. China, Vallabhuni, Rajeev Ratna

“…VLSI technology is essential for chip fabrication, and 3 to 8 decoder circuits are used in electronic gadgets; consistency of design, small, fast, in this…”
Get full text

Implementation of An Energy-Efficient Binary Square Rooter Using Reversible Logic By Applying The Non-Restoring Algorithm by Swathi, S., Sushma, S., Bindusree, V., Babitha, L, Sukesh, Goud K., Venkateswarlu, S. China, Vijay, V., Vallabhuni, Rajeev Ratna

“…Calculation of square root will be an essential mathematical operation that will have broad applications. In Hardware, the square root will be designed in…”
Get full text

QCA Based Optimized Arithmetic Models by Khadir, Mohammad, Shakthi, S., Lakshmanachari, S., Vijay, Vallabhuni, Venkateswarlu, S. China, Saritha, P., Vallabhuni, Rajeev Ratna

“…Quantum Dot Cellular Automata (QCA) offers a more efficient computational platform than CMOS. QCA is one of the most exemplary improvements proposed to replace…”
Get full text