Search Results - "Venditti, M.B."

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  1. 1

    256-channel bidirectional optical interconnect using VCSELs and photodiodes on CMOS by Plant, D.V., Venditti, M.B., Laprise, E., Faucher, J., Razavi, K., Chateauneuf, M., Kirk, A.G., Ahearn, J.S.

    Published in Journal of lightwave technology (01-08-2001)
    “…Two-dimensional parallel optical interconnects (2-D-POIs) are capable of providing large connectivity between elements in computing and switching systems…”
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    Journal Article
  2. 2

    On the design of large receiver and transmitter arrays for OE-VLSI applications by Venditti, M.B., Plant, D.V.

    Published in Journal of lightwave technology (01-12-2003)
    “…The design environment, design and test flows, and the constraints and challenges of implementing large two-dimensional arrays of receiver and transmitter…”
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    Journal Article
  3. 3

    Application of parallel forward-error correction in two-dimensional optical-data links by Faucher, J., Venditti, M.B., Plant, D.V.

    Published in Journal of lightwave technology (01-02-2003)
    “…We propose the use of on-chip parallel forward-error correction (FEC) to improve the performance of two-dimensional (2-D) optical-data links (2-D-ODLs). Using…”
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    Journal Article
  4. 4

    Design and test of an optoelectronic-VLSI chip with 540-element receiver-transmitter arrays using differential optical signaling by Venditti, M.B., Laprise, E., Faucher, J., Laprise, P.-O., Lugo, J.E.A., Plant, D.V.

    “…We have constructed an optoelectronic very-large-scale integration (OE-VLSI) chip with a 540-element receiver and transmitter array. Differential optical…”
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  5. 5

    Skew reduction for synchronous OE-VLSI receiver applications by Venditti, M.B., Schwartz, J.D., Plant, D.V.

    Published in IEEE photonics technology letters (01-06-2004)
    “…A dc photocurrent rejection technique for optically differential receivers is proposed to reduce the sensitivity of receiver latency to variations in average…”
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  6. 6

    System-level test and yield improvement for optoelectronic-VLSI chips by Thibodeau, J.-P., Venditti, M.B., Plant, D.V.

    “…Some of the unique issues involved in testing transmitter and receiver circuits for optoelectronic-very-large-scale-integrated (OE-VLSI) applications are…”
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  7. 7

    A hybrid-SEED smart pixel array for a four-stage intelligent optical backplane demonstrator by Rolston, D.R., Plant, D.V., Szymanski, T.H., Hinton, H.S., Hsiao, W.S., Ayliffe, M.H., Kabal, D., Venditti, M.B., Desai, P., Krishnamoorthy, A.V., Goossen, K.W., Walker, J.A., Tseng, B., Hui, S.P., Cunningham, J.E., Jan, W.Y.

    “…This paper describes the VLSI design, layout, and testing of a Hybrid-SEED smart pixel array for a four-stage intelligent optical backplane. The Hybrid-SEED…”
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