Search Results - "Veeramachaneni, V."

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  1. 1

    DED: Database of Evolutionary Distances by Veeramachaneni, Vamsi, Makałowski, Wojciech

    Published in Nucleic acids research (01-01-2005)
    “…A large database of homologous sequence alignments with good estimates of evolutionary distances can be a valuable resource for molecular evolutionary studies…”
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    Journal Article
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    A TCP offload accelerator for 10 Gb/s Ethernet in 90-nm CMOS by Hoskote, Y., Bloechel, B.A., Dermer, G.E., Erraguntla, V., Finan, D., Howard, J., Klowden, D., Narendra, S.G., Ruhl, G., Tschanz, J.W., Sriram Vangal, Veeramachaneni, V., Wilson, H., Jianping Xu, Borkar, N.

    Published in IEEE journal of solid-state circuits (01-11-2003)
    “…This programmable engine is designed to offload TCP inbound processing at wire speed for 10-Gb/s Ethernet, supporting 64-byte minimum packet size. This…”
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    Journal Article
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    Integrative annotation of 21,037 human genes validated by full-length cDNA clones by Imanishi, Tadashi, Itoh, Takeshi, Suzuki, Yutaka, O'Donovan, Claire, Fukuchi, Satoshi, Koyanagi, Kanako O, Barrero, Roberto A, Tamura, Takuro, Yamaguchi-Kabata, Yumi, Tanino, Motohiko, Yura, Kei, Miyazaki, Satoru, Ikeo, Kazuho, Homma, Keiichi, Kasprzyk, Arek, Nishikawa, Tetsuo, Hirakawa, Mika, Thierry-Mieg, Jean, Thierry-Mieg, Danielle, Ashurst, Jennifer, Jia, Libin, Nakao, Mitsuteru, Thomas, Michael A, Mulder, Nicola, Karavidopoulou, Youla, Jin, Lihua, Kim, Sangsoo, Yasuda, Tomohiro, Lenhard, Boris, Eveno, Eric, Suzuki, Yoshiyuki, Yamasaki, Chisato, Takeda, Jun-ichi, Gough, Craig, Hilton, Phillip, Fujii, Yasuyuki, Sakai, Hiroaki, Tanaka, Susumu, Amid, Clara, Bellgard, Matthew, Bonaldo, Maria de Fatima, Bono, Hidemasa, Bromberg, Susan K, Brookes, Anthony J, Bruford, Elspeth, Carninci, Piero, Chelala, Claude, Couillault, Christine, de Souza, Sandro J, Debily, Marie-Anne, Devignes, Marie-Dominique, Dubchak, Inna, Endo, Toshinori, Estreicher, Anne, Eyras, Eduardo, Fukami-Kobayashi, Kaoru, Gopinath, Gopal R, Graudens, Esther, Hahn, Yoonsoo, Han, Michael, Han, Ze-Guang, Hanada, Kousuke, Hanaoka, Hideki, Harada, Erimi, Hashimoto, Katsuyuki, Hinz, Ursula, Hirai, Momoki, Hishiki, Teruyoshi, Hopkinson, Ian, Imbeaud, Sandrine, Inoko, Hidetoshi, Kanapin, Alexander, Kaneko, Yayoi, Kasukawa, Takeya, Kelso, Janet, Kersey, Paul, Kikuno, Reiko, Kimura, Kouichi, Korn, Bernhard, Kuryshev, Vladimir, Makalowska, Izabela, Makino, Takashi, Mano, Shuhei, Mariage-Samson, Regine, Mashima, Jun, Matsuda, Hideo, Mewes, Hans-Werner, Minoshima, Shinsei, Nagai, Keiichi, Nagasaki, Hideki, Nagata, Naoki, Nigam, Rajni, Ogasawara, Osamu, Ohara, Osamu, Ohtsubo, Masafumi, Okada, Norihiro, Okido, Toshihisa, Oota, Satoshi, Ota, Motonori, Ota, Toshio

    Published in PLoS biology (01-06-2004)
    “…The human genome sequence defines our inherent biological potential; the realization of the biology encoded therein requires knowledge of the function of each…”
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    Journal Article
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    Mammalian overlapping genes: the comparative perspective by Veeramachaneni, Vamsi, Makałowski, Wojciech, Galdzicki, Michal, Sood, Raman, Makałowska, Izabela

    Published in Genome research (01-02-2004)
    “…It is believed that 3.2 billion bp of the human genome harbor approximately 35000 protein-coding genes. On average, one could expect one gene per 300000…”
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    Journal Article
  5. 5

    Eighty percent of proteins are different between humans and chimpanzees by Glazko, Galina, Veeramachaneni, Vamsi, Nei, Masatoshi, Makałowski, Wojciech

    Published in Gene (14-02-2005)
    “…The chimpanzee is our closest living relative. The morphological differences between the two species are so large that there is no problem in distinguishing…”
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    Journal Article
  6. 6

    Selective node engineering for chip-level soft error rate improvement [in CMOS] by Karnik, T., Vangal, S., Veeramachaneni, V., Hazucha, P., Erraguntla, V., Borkar, S.

    “…This paper presents a technique to selectively engineer sequential or domino nodes in high performance circuits to improve soft error rate (SER) induced by…”
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    Conference Proceeding
  7. 7

    Mastering seeds for genomic size nucleotide BLAST searches by Gotea, Valer, Veeramachaneni, Vamsi, Makałowski, Wojciech

    Published in Nucleic acids research (01-12-2003)
    “…One of the most common activities in bioinformatics is the search for similar sequences. These searches are usually carried out with the help of programs from…”
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    Journal Article
  8. 8

    Visualizing sequence similarity of protein families by Veeramachaneni, Vamsi, Makałowski, Wojciech

    Published in Genome research (01-06-2004)
    “…Classification of proteins into families is one of the main goals of functional analysis. Proteins are usually assigned to a family on the basis of the…”
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    Journal Article
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    5-GHz 32-bit integer execution core in 130-nm dual-V/T/ CMOS by Vangal, S, Anders, M A, Borkar, N, Seligman, E, Govindarajulu, V, Erraguntla, V, Wilson, H, Pangal, A, Veeramachaneni, V, Tschanz, J W, Ye, Y, Somasekhar, D, Bloechel, B A, Dermer, G E, Krishnamurthy, R K, Soumyanath, K, Mathew, S, Narendra, S G, Stan, M R

    Published in IEEE journal of solid-state circuits (01-11-2002)
    “…A 32-bit integer execution core containing a Han-Carlson arithmetic-logic unit (ALU), an 8-entry x 2 ALU instruction scheduler loop and a 32-entry x 32-bit…”
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    Journal Article
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    5-GHz 32-bit integer execution core in 130-nm dual-V/sub T/ CMOS by Vangal, S., Anders, M.A., Borkar, N., Seligman, E., Govindarajulu, V., Erraguntla, V., Wilson, H., Pangal, A., Veeramachaneni, V., Tschanz, J.W., Ye, Y., Somasekhar, D., Bloechel, B.A., Dermer, G.E., Krishnamurthy, R.K., Soumyanath, K., Mathew, S., Narendra, S.G., Stan, M.R., Thompson, S., De, V., Borkar, S.

    Published in IEEE journal of solid-state circuits (01-11-2002)
    “…A 32-bit integer execution core containing a Han-Carlson arithmetic-logic unit (ALU), an 8-entry /spl times/ 2 ALU instruction scheduler loop and a 32-entry…”
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    Journal Article
  13. 13

    5-GHz 32-bit integer execution core in 130-nm dual-V sub(T) CMOS by Vangal, S, Anders, MA, Borkar, N, Seligman, E, Govindarajulu, V, Erraguntla, V, Wilson, H, Pangal, A, Veeramachaneni, V, Tschanz, J W, Ye, Y, Somasekhar, D, Bloechel, BA, Dermer, GE, Krishnamurthy, R K, Soumyanath, K, Mathew, S, Narendra, S G, Stan, M R, Thompson, S, De, V, Borkar, S

    Published in IEEE journal of solid-state circuits (01-01-2002)
    “…A 32-bit integer execution core containing a Han-Carlson arithmetic-logic unit (ALU), an 8-entry 2 ALU instruction scheduler loop and a 32-entry 32-bit…”
    Get full text
    Journal Article
  14. 14

    A 2 5 GHz 32 b integer-execution core in 130 nm dual-V sub(T) CMOS by Vangal, S, Borkar, N, Seligman, E, Govindarajulu, V, Erraguntla, V, Wilson, H, Pangal, A, Veeramachaneni, V, Anders, M, Tschanz, J, Ye, Y, Somasekhar, D, Bloechel, B, Dermer, G, Krishnamurthy, R

    “…A discussion on a 25 GHz 32b integer-execution core in 130nm dual-V sub(T) CMOS is presented. The architecture of the system consists of three first in first…”
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    Journal Article
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    5 GHz 32 b integer-execution core in 130 nm dual-V sub(T) CMOS by Vangal, S, Borkar, N, Seligman, E, Govindarajulu, V, Erraguntla, V, Wilson, H, Pangal, A, Veeramachaneni, V, Anders, M, Tschanz, J, Ye, Y, Somasekhar, D, Bloechel, B, Dermer, G, Krishnamurthy, R

    “…A 32 b integer execution core implements 12 instructions. Circuit and body bias techniques together increase the core clock frequency to 5 GHz. In a 130 nm…”
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    Journal Article
  16. 16

    A 5 GHz floating point multiply-accumulator in 90 nm dual V/sub T/ CMOS by Vangal, S., Hoskote, Y., Somasekhar, D., Erraguntla, V., Howard, J., Ruhl, G., Veeramachaneni, V., Finan, D., Mathew, S., Borkar, N.

    “…A 32 b single-cycle floating point accumulator that uses base 32 and carry-save format with delayed addition is described. Combined algorithmic, logic and…”
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    Conference Proceeding
  17. 17

    A 10GHz TCP offload accelerator for 10Gb/s Ethernet in 90nm dual-V/sub T/ CMOS by Hoskote, Y., Erraguntla, V., Finan, D., Howard, J., Klowden, D., Narendra, S., Ruhl, G., Tschanz, J., Vangal, S., Veeramachaneni, V., Wilson, H., Jianping Xu, Borkar, N.

    “…This prototype offloads TCP input processing on minimum packet sizes at wire speed for 10Gb/s Ethernet. The design employs a 10GHz core with a specialized…”
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    Conference Proceeding
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    Index of Suspicion

    Published in Pediatrics in review (01-06-2001)
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    Journal Article
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