Search Results - "Veeramachaneni, V."
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DED: Database of Evolutionary Distances
Published in Nucleic acids research (01-01-2005)“…A large database of homologous sequence alignments with good estimates of evolutionary distances can be a valuable resource for molecular evolutionary studies…”
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A TCP offload accelerator for 10 Gb/s Ethernet in 90-nm CMOS
Published in IEEE journal of solid-state circuits (01-11-2003)“…This programmable engine is designed to offload TCP inbound processing at wire speed for 10-Gb/s Ethernet, supporting 64-byte minimum packet size. This…”
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Integrative annotation of 21,037 human genes validated by full-length cDNA clones
Published in PLoS biology (01-06-2004)“…The human genome sequence defines our inherent biological potential; the realization of the biology encoded therein requires knowledge of the function of each…”
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Mammalian overlapping genes: the comparative perspective
Published in Genome research (01-02-2004)“…It is believed that 3.2 billion bp of the human genome harbor approximately 35000 protein-coding genes. On average, one could expect one gene per 300000…”
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Eighty percent of proteins are different between humans and chimpanzees
Published in Gene (14-02-2005)“…The chimpanzee is our closest living relative. The morphological differences between the two species are so large that there is no problem in distinguishing…”
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Selective node engineering for chip-level soft error rate improvement [in CMOS]
Published in 2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302) (2002)“…This paper presents a technique to selectively engineer sequential or domino nodes in high performance circuits to improve soft error rate (SER) induced by…”
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Conference Proceeding -
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Mastering seeds for genomic size nucleotide BLAST searches
Published in Nucleic acids research (01-12-2003)“…One of the most common activities in bioinformatics is the search for similar sequences. These searches are usually carried out with the help of programs from…”
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Visualizing sequence similarity of protein families
Published in Genome research (01-06-2004)“…Classification of proteins into families is one of the main goals of functional analysis. Proteins are usually assigned to a family on the basis of the…”
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5-GHz 32-bit integer execution core in 130-nm dual-VT CMOS
Published in IEEE journal of solid-state circuits (01-11-2002)Get full text
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5-GHz 32-bit integer execution core in 130-nm dual-V/T/ CMOS
Published in IEEE journal of solid-state circuits (01-11-2002)“…A 32-bit integer execution core containing a Han-Carlson arithmetic-logic unit (ALU), an 8-entry x 2 ALU instruction scheduler loop and a 32-entry x 32-bit…”
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Index of suspicion. Case 2. Diagnosis: Norrie disease
Published in Pediatrics in review (01-06-2001)Get full text
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5-GHz 32-bit integer execution core in 130-nm dual-V/sub T/ CMOS
Published in IEEE journal of solid-state circuits (01-11-2002)“…A 32-bit integer execution core containing a Han-Carlson arithmetic-logic unit (ALU), an 8-entry /spl times/ 2 ALU instruction scheduler loop and a 32-entry…”
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5-GHz 32-bit integer execution core in 130-nm dual-V sub(T) CMOS
Published in IEEE journal of solid-state circuits (01-01-2002)“…A 32-bit integer execution core containing a Han-Carlson arithmetic-logic unit (ALU), an 8-entry 2 ALU instruction scheduler loop and a 32-entry 32-bit…”
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A 2 5 GHz 32 b integer-execution core in 130 nm dual-V sub(T) CMOS
Published in Digest of technical papers - IEEE International Solid-State Circuits Conference (01-01-2002)“…A discussion on a 25 GHz 32b integer-execution core in 130nm dual-V sub(T) CMOS is presented. The architecture of the system consists of three first in first…”
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5 GHz 32 b integer-execution core in 130 nm dual-V sub(T) CMOS
Published in Digest of technical papers - IEEE International Solid-State Circuits Conference (01-01-2002)“…A 32 b integer execution core implements 12 instructions. Circuit and body bias techniques together increase the core clock frequency to 5 GHz. In a 130 nm…”
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A 5 GHz floating point multiply-accumulator in 90 nm dual V/sub T/ CMOS
Published in 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC (2003)“…A 32 b single-cycle floating point accumulator that uses base 32 and carry-save format with delayed addition is described. Combined algorithmic, logic and…”
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Conference Proceeding -
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A 10GHz TCP offload accelerator for 10Gb/s Ethernet in 90nm dual-V/sub T/ CMOS
Published in 2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC (2003)“…This prototype offloads TCP input processing on minimum packet sizes at wire speed for 10Gb/s Ethernet. The design employs a 10GHz core with a specialized…”
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Conference Proceeding -
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Aligning two fragmented sequences
Published in Proceedings 16th International Parallel and Distributed Processing Symposium (2002)Get full text
Conference Proceeding -
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A 25 GHz 32 b integer-execution core in 130 nm dual-V/sub T/ CMOS
Published in 2002 IEEE International Solid-State Circuits Conference. Digest of Technical Papers (Cat. No.02CH37315) (2002)“…A 32 b integer execution core implements 12 instructions. Circuit and body bias techniques together increase the core clock frequency to 5 GHz. In a 130 nm…”
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Conference Proceeding