Search Results - "Varghese, Kuruvilla"
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1
Runtime Programmable and Memory Bandwidth Optimized FPGA-Based Coprocessor for Deep Convolutional Neural Network
Published in IEEE transaction on neural networks and learning systems (01-12-2018)“…The deep convolutional neural network (DCNN) is a class of machine learning algorithms based on feed-forward artificial neural network and is widely used for…”
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Journal Article -
2
Network Emulation For Tele-driving Application Development
Published in 2021 International Conference on COMmunication Systems & NETworkS (COMSNETS) (05-01-2021)“…We present a co-emulation framework for Connected Autonomous Vehicle for development and validation of technologies for teleoperation of semi-autonomous…”
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Conference Proceeding -
3
Endovascular management of hemoptysis in a known case of tetralogy of fallot and tuberculosis complicated with aspergilloma: a case report
Published in Egyptian journal of radiology and nuclear medicine (21-06-2022)“…Background Hemoptysis is a life-threatening complication due to bleeding either from hypertrophied bronchial arteries or enlarged non-bronchial systemic…”
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Journal Article -
4
Multiparametric Measurements of the Eustachian tube and Peritubal Region Using Computed Tomography as a Preoperative Workup for Tuboplasty
Published in Indian journal of otolaryngology, and head, and neck surgery (01-04-2023)“…Background Eustachian tube dysfunction (ETD) is considered a causative factor for middle ear disease as well as treatment failure. The pathogenesis may be a…”
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Journal Article -
5
High-Level Synthesis of Geant4 Particle Transport Application for FPGA
Published in 2022 25th Euromicro Conference on Digital System Design (DSD) (01-08-2022)“…Geant4 is a software toolkit that simulates particle transport in matter and is widely used in high energy, nuclear, and medical physics applications. As…”
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Conference Proceeding -
6
A Soft RISC-V Vector Processor for Edge-AI
Published in 2022 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems (VLSID) (01-02-2022)“…Edge computing is the key to unlocking the power of deep neural networks on edge devices. However, deploying power-hungry deep neural network inference on…”
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Conference Proceeding -
7
Hybrid Working Set Algorithm for SVM Learning With a Kernel Coprocessor on FPGA
Published in IEEE transactions on very large scale integration (VLSI) systems (01-10-2015)“…Support vector machines (SVM) are a popular class of supervised models in machine learning. The associated compute intensive learning algorithm limits their…”
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Journal Article -
8
Hardware Accelerator for Capsule Network based Reinforcement Learning
Published in 2022 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems (VLSID) (01-02-2022)“…Convolutional neural networks are widely used in reinforcement learning. Capsule networks are gaining popularity over the traditional convolutional neural…”
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Conference Proceeding -
9
Accelerating method of moments based package-board 3D parasitic extraction using FPGA
Published in Microwave and optical technology letters (01-04-2016)“…ABSTRACT In this article, a Field Programmable Gate Array (FPGA)‐based hardware accelerator for 3D electromagnetic extraction, using Method of Moments (MoM) is…”
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Journal Article -
10
A Scalable High Throughput Firewall in FPGA
Published in 2008 16th International Symposium on Field-Programmable Custom Computing Machines (01-04-2008)“…High end network security applications demand high speed operation and large rule set support. Packet classification is the core functionality that demands…”
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Conference Proceeding -
11
Dynamically reconfigurable regular expression matching architecture
Published in 2008 International Conference on Application-Specific Systems, Architectures and Processors (01-07-2008)“…Regular Expressions are generic representations for a string or a collection of strings. This paper focuses on implementation of a regular expression matching…”
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Conference Proceeding -
12
Design of a Multi-Core Compatible Linux Bootable 64-bit Out-of-Order RISC-V Processor Core
Published in 2023 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems (VLSID) (01-01-2023)“…We present the design of a 64-bit Out-of-Order Superscalar processor core based on open-source RISC-V instruction set architecture. It implements RV64IMAFDC…”
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Conference Proceeding -
13
The spectrum of radiological findings of rhino orbital cerebral mucormycosis with endoscopic and histopathological features in patients with COVID 19: A descriptive study
Published in Nigerian journal of medicine (01-11-2022)“…Background: There had been an increasing incidence of mucormycosis during the COVID-19 pandemic. Aim: This study evaluates the pattern of radiological imaging,…”
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Journal Article -
14
A high-throughput clock-less architecture for soft-output Viterbi detection
Published in 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS) (01-08-2017)“…Viterbi detectors are widely used in data recording channels in the timing loop as well as in the digital back end before error-correction decoding to detect…”
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Conference Proceeding -
15
A High Throughput Non-uniformly Quantized Binary SOVA Detector on FPGA
Published in 2016 29th International Conference on VLSI Design and 2016 15th International Conference on Embedded Systems (VLSID) (01-01-2016)“…Soft output Viterbi detectors (SOVA) are universally used in all communication receivers within the digital back-end circuitry for mitigating intersymbol…”
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Conference Proceeding Journal Article -
16
Efficient Hardware Design of Parameterized Posit Multiplier and Posit Adder
Published in 2023 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) (19-11-2023)“…Posit arithmetic, an alternative to IEEE 754 f1oating-point arithmetic, offers higher precision and a wider dynamic range. In posit, the number of bits…”
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17
Synchronization Support in 64-bit Out-Of-Order Superscalar Dual-Core RISC-V Processor
Published in 2024 IEEE 9th International Conference for Convergence in Technology (I2CT) (05-04-2024)“…This paper discusses the implementation of atomic instructions in a dual-core 64-bit out-of-order superscalar processors based on the open-source RISC-V…”
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Conference Proceeding -
18
High Throughput Hardware Acceleration for Image Generation using HLS
Published in 2023 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) (19-11-2023)“…New machine learning techniques have been developed and used to generate new data in recent years. Genera-tive adversarial networks is a neural network model…”
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Conference Proceeding -
19
High Throughput Hardware for Hoeffding Tree Algorithm with Adaptive Naive Bayes Predictor
Published in 2021 6th International Conference for Convergence in Technology (I2CT) (02-04-2021)“…Hoeffding tree algorithm is a popular online decision tree algorithm capable of learning from huge data streams. The algorithm involves complex time consuming…”
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Conference Proceeding -
20
An FPGA Based Accelerator of the Bi-Directional Wavefront Algorithm for Pairwise Sequence Alignment
Published in 2023 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS) (19-11-2023)“…Advances in next-generation sequencing technolo-gies have resulted in a prodigious amount of genomic sequence data. Harnessing the information encoded in a…”
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Conference Proceeding