Search Results - "Van Olmen, Jan"

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  1. 1

    Thin-Film Quantum Dot Photodiode for Monolithic Infrared Image Sensors by Malinowski, Pawel E, Georgitzikis, Epimitheas, Maes, Jorick, Vamvaka, Ioanna, Frazzica, Fortunato, Van Olmen, Jan, De Moor, Piet, Heremans, Paul, Hens, Zeger, Cheyns, David

    Published in Sensors (Basel, Switzerland) (10-12-2017)
    “…Imaging in the infrared wavelength range has been fundamental in scientific, military and surveillance applications. Currently, it is a crucial enabler of new…”
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    Journal Article
  2. 2

    Through-Silicon-Via Capacitance Reduction Technique to Benefit 3-D IC Performance by Katti, Guruprasad, Stucchi, Michele, Van Olmen, Jan, De Meyer, Kristin, Dehaene, Wim

    Published in IEEE electron device letters (01-06-2010)
    “…Through-silicon via (TSV) constitutes a key component interconnecting adjacent dies vertically to form 3-D integrated circuits. In this letter, we propose a…”
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    Journal Article
  3. 3

    On a More Accurate Assessment of Scaled Copper/Low-k Interconnects Performance by Travaly, Y., Mandeep, B., Carbonell, L., Tokei, Z., Van Olmen, J., Iacopi, F., Van Hove, M., Stucchi, M., Maex, K.

    “…Interconnect RC delay, predominantly affected by the effective dielectric constant (k-value) and by the copper resistivity (rho Cu ), is an important…”
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    Journal Article
  4. 4
  5. 5

    Cu to Cu interconnect using 3D-TSV and wafer to wafer thermocompression bonding by Huyghebaert, Cedric, Van Olmen, Jan, Civale, Yann, Phommahaxay, Alain, Jourdain, Anne, Sood, Sumant, Farrens, Shari, Soussan, Philippe

    “…In this paper we report on the use of Silicon wafer to wafer bonding technology using Trough Silicon Vias (TSV) and Cu to Cu hybrid interconnects. We…”
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    Conference Proceeding
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    Enabling 10µm pitch hybrid Cu-Cu IC stacking with Through Silicon Vias by Huyghebaert, Cedric, Van Olmen, Jan, Chukwudi, Okoro, Coenen, Jens, Jourdain, Anne, Van Cauwenberghe, Marc, Agarwahl, Rahul, Phommahaxay, Alain, Stucchi, Michele, Soussan, Philippe

    “…Recently imec demonstrated for the first time 3D integrated circuits obtained by die-to-die stacking using Cu Through Silicon Vias (TSV) on 200 mm wafers. The…”
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    Conference Proceeding
  8. 8

    TSV metrology and inspection challenges by Alapati, R., Travaly, Y., Van Olmen, J., Teixeira, R.C., Vaes, J., van Cauwenbergh, M., Jourdain, A., Verbinnen, G., Marcuccilli, G., Florence, G., Wolfling, S., Pelissier, C., Haiping Zhang, Sinha, J., Machura, A., Malik, I.

    “…The interest in 3D packaging and specifically TSV processes has grown significantly in the past few years, with nearly every major chip manufacturer announcing…”
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    Conference Proceeding