Search Results - "V, Ranjitha H"

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    Low Power Design and Implementation of Multi-Output Carry Look-Ahead Adder by V, Ranjitha H, Hiremath, Sujatha

    “…Adders are the most elementary and important blocks in Digital Electronics. Adder designs are constrained by time required for carry propagation. Sum…”
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    Conference Proceeding
  2. 2

    RTL Power Estimation: Early Design Cycle Approach for SoC Power Sign-Off by Ranjitha, H V, Hiremath, Sujatha, Langadi, Saya Goud

    “…VLSI industry is driven by three main factors. They are Power, delay and area. In 180nm and 90nm days, IP (Intellectual Property) and SoC (System on Chip)…”
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    Conference Proceeding
  3. 3

    Design and implementation of low power mitchell algorithm based logarithmic multiplier by Ranjitha, H.V., Pooja, K.S., Ravish Aradhya, H. V.

    “…Multiplication is a significant operation in signal processing but slow and complex leading to high power consumption and area. Digital Signal Processing…”
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    Conference Proceeding
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