Search Results - "Umimoto, H."

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  1. 1

    Three-dimensional numerical simulation of local oxidation of silicon by Umimoto, H., Odanaka, S.

    Published in IEEE transactions on electron devices (01-03-1991)
    “…The nitride mask bending stress is modeled in three dimensions by using the beam bending theory. The stress effect on the oxide growth is taken into account…”
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    Journal Article
  2. 2

    The inverse-narrow-width effect of LOCOS isolated n-MOSFET in a high-concentration p-well by Ohe, K., Yabu, T., Kugo, S., Umimoto, H., Odanaka, S.

    Published in IEEE electron device letters (01-12-1992)
    “…The inverse-narrow-width effect (INWE) of a LOCOS-isolated n-MOSFET formed in high concentration p-wells is described. The threshold behavior is characterized…”
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    Journal Article
  3. 3

    Numerical simulation of stress-dependent oxide growth at convex and concave corners of trench structures by Umimoto, H., Odanaka, S., Nakao, I.

    Published in IEEE electron device letters (01-07-1989)
    “…A numerical simulation of oxide thinning at convex and concave corners of trench structures is discussed. The stress effect on the oxide growth is modeled by…”
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    Journal Article
  4. 4

    SMART-II: a three-dimensional CAD model for submicrometer MOSFET's by Odanaka, S., Hiroki, A., Ohe, K., Moriyama, K., Umimoto, H.

    “…The authors describe a three-dimensional CAD model for submicrometer MOSFETs. The model has been implemented in a three-dimensional process/device integrated…”
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    Journal Article
  5. 5

    SMART-P: rigorous three-dimensional process simulator on a supercomputer by Odanaka, S., Umimoto, H., Wakabayashi, M., Esaki, H.

    “…A description is given of a three-dimensional process simulator, named SMART-P, that is based on the finite-difference approach to the supercomputer FACOM…”
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    Journal Article
  6. 6

    Numerical modeling of nonplanar oxidation coupled with stress effects by Umimoto, H., Odanaka, S., Nakao, I., Esaki, H.

    “…The study focuses on the numerical solution method based on a finite-difference approach with the coordinate transformation method for simulating the nonplanar…”
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    Journal Article
  7. 7

    A self-aligned retrograde twin-well structure with buried p+-layer by ODANAKA, S, YABU, T, SHIMIZU, N, UMIMOTO, H, OHZONE, T

    Published in IEEE electron device letters (01-06-1989)
    “…The retrograde twin wells and buried p( ) layer are fabricated by a single lithographic step using high-energy ion implantation. The retrograde n-well is…”
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    Journal Article
  8. 8
  9. 9

    Improvement of RSF for a statistical design of lithographic process by Goda, A., Misaka, A., Umimoto, H., Odanaka, S.

    “…A statistical design method for lithographic process using the RSM (Response Surface Method) is developed. The RSF for CD (Critical Dimension) in optical…”
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    Conference Proceeding
  10. 10
  11. 11

    A self-aligned retrograde twin-well structure with buried p/sup +/-layer by Odanaka, S., Yabu, T., Shimizu, N., Umimoto, H., Ohzone, T.

    Published in IEEE transactions on electron devices (01-07-1990)
    “…A self-aligned retrograde twin-well structure with a buried p/sup +/-layer surrounding the n-well is presented. The retrograde twin well and buried p/sup…”
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    Journal Article
  12. 12

    A self-aligned retrograde twin-well structure with buried p/sup +/-layer by Odanaka, S., Yabu, T., Shimizu, N., Umimoto, H., Ohzone, T.

    Published in IEEE electron device letters (01-06-1989)
    “…The retrograde twin wells and buried p/sup +/ layer are fabricated by a single lithographic step using high-energy ion implantation. The retrograde n-well is…”
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    Journal Article
  13. 13

    A self-aligned retrograde twin-well structure with buried p+-layer by ODANAKA, S, YABU, T, SHIMIZU, N, UMIMOTO, H, OHZONE, T

    Published in IEEE transactions on electron devices (01-07-1990)
    “…A self-aligned retrograde twin-well structure with a buried p( )-layer surrounding the n-well is presented. The retrograde twin well and buried p( )-layer are…”
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    Journal Article
  14. 14

    A self-aligned retrograde twin-well structure with buried p super(+)-layer by Odanaka, S, Yabu, T, Shimizu, N, Umimoto, H, Ohzone, T

    Published in IEEE electron device letters (01-01-1989)
    “…This paper reports a self-aligned retrograde twin-well structure with a buried p super(+)-layer surrounding the n-well. The retrograde twin wells and buried p…”
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    Journal Article
  15. 15

    A Three-Dimensional Dynamic Simulation of Borophosphosilicate Glass Flow by Umimoto, H., Odanaka, S., Imai, S.

    Published in 1991 Symposium on VLSI Technology (1991)
    “…This paper describes a three-dimensional simulation of Borophosphosilicate glass (BPSG) flow for the first time. The viscosity of BPSG is modeled by…”
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    Conference Proceeding
  16. 16

    Impact of the reduction of the gate to drain capacitance on low voltage operated CMOS devices by Yamashita, K., Nakaoka, H., Kurimoto, K., Umimoto, H., Odanaka, S.

    “…The effect of the gate to drain capacitance on low voltage operated CMOS devices is investigated. It is found that the Miller and feed-forward effects are…”
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    Conference Proceeding
  17. 17

    A 0.18 /spl mu/m Ti-salicided p-MOSFET with shallow junctions fabricated by rapid thermal processing in an NH/sub 3/ ambient by Segawa, M., Yabu, T., Arai, M., Moriwaki, M., Umimoto, H., Sekiguchi, M., Kanda, A.

    “…This paper reports a 0.18 /spl mu/m Ti-salicided p-MOSFET with shallow junctions fabricated by rapid thermal processing (RTP) in an NH/sub 3/ ambient and low…”
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    Conference Proceeding
  18. 18

    High speed 0.1 /spl mu/m dual gate CMOS with low energy phosphorus/boron implantation and cobalt salicide by Hori, A., Umimoto, H., Nakaoka, H., Sekiguchi, M., Segawa, M., Arai, M., Takase, M., Kanda, A.

    “…A novel dual gate CMOS with low energy phosphorus/boron implantation and cobalt salicide is proposed. This technology suppresses boron penetration for pMOS,…”
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    Conference Proceeding
  19. 19

    A statistical critical dimension control at CMOS cell level by Misaka, A., Goda, A., Matsuoka, K., Umimoto, H., Odanaka, S.

    “…This paper reports a new statistical methodology for controlling the spreads of the CD (critical dimension) distribution in the lithography process. Response…”
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    Conference Proceeding
  20. 20

    Trench Isolation with Boron Implanted Side-Walls for Controlling Narrow-Width Effect of n-MOS Threshold Voltages by Fuse, G., Odanaka, S., Sasago, M., Fukumoto, M., Shinohara, S., Umimoto, H., Yabu, T., Ohzone, T., Ishihara, T.

    “…Trench isolation technology with boron implanted vertical side-walls is presented andproved to be useful for completely suppressing humps in subthreshold…”
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    Conference Proceeding