Search Results - "Uemura, Taiki"

Soft-Error in SRAM at Ultra-Low Voltage and Impact of Secondary Proton in Terrestrial Environment by Uemura, Taiki, Kato, Takashi, Matsuyama, Hideya, Hashimoto, Masanori

“…This paper presents soft-error measurement results through neutron and alpha irradiation tests and simulation in SRAM at ultra-low voltages, down to 0.19 V…”
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Neutron Shielding Effect of Stacked Servers and Its Impact on Reduction of Soft Error Rate by Kato, Takashi, Akano, Ryoto, Uemura, Taiki, Watanabe, Yukinobu, Matsuyama, Hideya

“…The shielding effect of stacked servers on terrestrial neutrons and its impact on soft error rate of the device in the server are studied. Shielding simulation…”
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The 10th Generation 16-Core SPARC64™ Processor for Mission Critical UNIX Server by Kan, Ryuji, Tanaka, Tomohiro, Sugizaki, Go, Ishizaka, Kinya, Nishiyama, Ryuichi, Sakabayashi, Sota, Koyanagi, Yoichi, Iwatsuki, Ryuji, Hayasaka, Kazumi, Uemura, Taiki, Ito, Gaku, Ozeki, Yoshitomo, Adachi, Hiroyuki, Furuya, Kazuhiro, Motokurumada, Tsuyoshi

“…A 10th generation SPARC64 processor, fabricated in enhanced 28 nm CMOS, runs at 3.0 GHz and contains 16 cores with 24 MB shared L2 cache and system/DDR3/PCIe…”
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Abnormally large Ni grains epitaxially grown by electrodeposition on Cu substrate by Uemura, Taiki, Chang, Tso-Fu Mark, Shibata, Akinobu, Sone, Masato

“…This study investigates formation of abnormally large grains in a Ni layer electrodeposited using additive-free Watts bath. The Ni electrodeposited layer had…”
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Impact of package on neutron induced single event upset in 20 nm SRAM by Uemura, Taiki, Kato, Takashi, Matsuyama, Hideya, Hashimoto, Masanori

“…This work investigates the impact of package structure on single event upset (SEU) rate through neutron irradiation test and Monte Carlo simulation of the…”
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Neutron-Induced Soft-Error Simulation Technology for Logic Circuits by Uemura, Taiki, Tosaka, Yoshiharu, Satoh, Shigeo

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Soft Error Hardened Latch and Its Estimation Method by Uemura, Taiki, Tanabe, Ryo, Tosaka, Yoshiharu, Satoh, Shigeo

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Mitigation technique against multi-bit-upset without area, performance and power overhead by Uemura, T., Tanabe, R., Matusyama, H.

“…In this work, we propose a technique for mitigating multi-bit-upset (MBU) which cannot be corrected by Error-Correction-Code (ECC) with using bit-line…”
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SEILA: Soft error immune latch for mitigating multi-node-SEU and local-clock-SET by Uemura, T, Tosaka, Y, Matsuyama, H, Shono, K, Uchibori, C J, Takahisa, K, Fukuda, M, Hatanaka, K

“…We have developed a robust latch for achieving high reliability in LSI. The latch can attenuate multi-node single-event-upset (MNSEU) and single event…”
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Neutron-induced soft error analysis in MOSFETs from a 65nm to a 25 nm design rule using multi-scale Monte Carlo simulation method by Abe, S., Watanabe, Y., Shibano, N., Sano, N., Furuta, H., Tsutsui, M., Uemura, T., Arakawa, T.

“…We have analyzed terrestrial neutron-induced soft errors in MOSFETs from a 65 nm to a 25 nm design rule by means of multi-scale Monte Carlo simulation using…”
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Robust Flip-Flop Circuit against Soft Errors for Combinational and Sequential Logic Circuits by Uemura, Taiki, Tosaka, Yoshiharu, Matsuyama, Hideya, Takahisa, Keiji, Fukuda, Mitsuhiro, Hatanaka, Kichiji

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Measurement of neutron-induced single event transient pulse width narrower than 100ps by Nakamura, H, Tanaka, K, Uemura, T, Takeuchi, K, Fukuda, T, Kumashiro, S

“…A novel SET pulse measurement circuit is proposed which can detect pulses narrower than 100 ps. Alternation of SET pulses during the propagation through the…”
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Technology Scaling Trend of Soft Error Rate in Flip-Flops in [Formula Omitted] nm Bulk FinFET Technology by Uemura, Taiki, Lee, Soonyoung, Monga, Udit, Choi, Jaehee, Lee, Seungbae, Pae, Sangwoo

“…This paper presents the soft error rate (SER) in flip-flops of 10-nm FinFET technology, and discusses the scaling trend of SER from 14- to 10-nm FinFET…”
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Comprehensive Study of SER in FDSOI-Planar: 28 nm to 18 nm Scaling Effect and Temperature Dependence by Uemura, Taiki, Chung, Byungjin, Choi, Jaehee, Lee, Seungbae, Chung, Shinyoung, Hwang, Yuchul, Pae, Sangwoo

“…We evaluate the soft error rate (SER) in 18 nm FDSOI-planar SRAM and investigate the scaling trend of SER in FDSOI-planar. Our findings demonstrate that the…”
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Soft-Error Sensitivity in SRAM Manufactured by Bulk Gate-All-Around (GAA) Technology by Uemura, Taiki, Chung, Byungjin, Choi, Jaehee, Lee, Seungbae, Chung, Shinyoung, Hwang, Yuchul, Pae, Sangwoo

“…This paper investigates the alpha and neutron-induced soft error rate (SER) in SRAMs manufactured with 3 nm bulk gate-all-around (bulk-GAA) process technology…”
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Impact of Design and Process on Alpha-Induced SER in 4 nm Bulk-FinFET SRAM by Uemura, Taiki, Chung, Byungjin, Chung, Shinyoung, Lee, Seungbae, Hwang, Yuchul, Pae, Sangwoo

“…This paper evaluates alpha-induced soft error rate \boldsymbol{(\alpha \text{SER})} by alpha irradiation test in four different SRAMs and simulation. The test…”
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Technology Scaling Trend of Soft Error Rate in Flip-Flops in 1\times nm Bulk FinFET Technology by Uemura, Taiki, Lee, Soonyoung, Monga, Udit, Choi, Jaehee, Lee, Seungbae, Pae, Sangwoo

“…This paper presents the soft error rate (SER) in flip-flops of 10-nm FinFET technology, and discusses the scaling trend of SER from 14- to 10-nm FinFET…”
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Investigation of single event upset and total ionizing dose in FeRAM for medical electronic tag by Uemura, Taiki, Hashimoto, Masanori

“…We investigate the single event upset (SEU) and total ionizing dose (TID) tolerance of FeRAMs fabricated in 180-nm technology against neutron and gamma-ray…”
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Detection Technique With Alpha-Tracking and Emissivity Comparison by Mori, Hiroko, Uemura, Taiki, Matsuyama, Hideya, Yamazaki, Takashi, Soeda, Takeshi

“…We achieved accurate alpha emissivity measurement with the alpha-tracking technique by decreasing the background effect. It is possible to lower the detection…”
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Machine Learning Based V-ramp VBD Predictive Model Using OCD-measured Fab Parameters for Early Detection of MOL Reliability Risk by Rhee, Sungman, Kim, Hyunjin, Park, Sangku, Uemura, Taiki, Hwang, Yuchul, Choo, Seungjin, Kim, Jinju, Rhee, Hwasung, Chung, Shinyoung

“…In this paper, we propose for the first time a breakdown voltage (\mathrm{V}_{\text{BD}}) prediction method using structural parameters measured in-process for…”
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