Search Results - "Tsung-Hsin Yu"

A 2.5-8Gb/s transceiver with 5-tap DFE and Second order CDR against 28-inch channel and 5000ppm SSC in 40nm CMOS technology by Wei-Chih Chen, Chien-Chun Tsai, Chih-Hsien Chang, Yung-Chow Peng, Fu-Lung Hsueh, Tsung-Hsin Yu, Jinn-Yeh Chien, Wen-Hung Huang, Chi-Chang Lu, Mu-Shan Lin, Chin-Ming Fu, Shu-Chun Yang, Chung-Wing Wong, Wan-Te Chen, Chin-Hua Wen, Li Yueh Wang, Chiang Pu

“…This paper presents a 2.5-8Gb/s transceiver for PCI Express Gen3.0/2.0/1.0 applications. To overcome channel loss of high bit rate application, a linear…”
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A 5Gb/s low-power PCI express/USB3.0 ready PHY in 40nm CMOS technology with high-jitter immunity by Mu-Shan Lin, Chien-Chun Tsai, Chih-Hsien Chang, Yung-Chow Peng, Tsung-Hsin Yu, Jinn-Yeh Chien, Chen, W.D., Chi-Chang Lu, Wei-Chih Chen, Fu, J., Yang, S.J., Chien-Hung Chen, Kuo-Liang Deng, Wen, C.H., Wang, L.Y.

“…A PCI Express 2.0/1.0 compatible SERDES system had been fabricated in TSMC 40 nm CMOS technology. With the implementation of one lane transceiver, PLL, and…”
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A new CMOS readout circuit for uncooled bolometric infrared focal plane arrays by Tsung-Hsin Yu, Chung-Yu Wu, Pei-Yen Chen, Fa-Wen Chi, Jiunn-Jye Luo, Cheng Der Chiang, Ya-Tung Cherng

“…By incorporating the basic constant current (CC) configuration with the buffered direct injection (BDI) structure, a new readout circuit called the constant…”
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