Search Results - "Travaly, Y."
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1
Integration challenges of copper Through Silicon Via (TSV) metallization for 3D-stacked IC integration
Published in Microelectronic engineering (01-05-2011)“…In this paper we will highlight key integration issues that were encountered during the development of the 3D-stacked IC Through Silicon Via (TSV) module and…”
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Journal Article Conference Proceeding -
2
Challenges in the implementation of low-k dielectrics in the back-end of line
Published in Microelectronic engineering (01-06-2005)“…The introduction of ultra low-k materials in copper technology has been much slower than anticipated in the ITRS Roadmap. The introduction of porosity in low-k…”
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Journal Article Conference Proceeding -
3
Selective self-assembled monolayer coating to enable Cu-to-Cu connection in dual damascene vias
Published in Microelectronic engineering (01-06-2013)“…In order to enable an oxide-free Cu-to-Cu bonding in a (dual) damascene process, 3-aminopropyltrimethoxysilane- and decanethiol-derived self-assembled…”
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4
Thermomechanical properties of thin organosilicate glass films treated with ultraviolet-assisted cure
Published in Acta materialia (01-02-2007)“…Ultraviolet (UV)-assisted cure has recently been reported as an efficient method to enhance the mechanical properties of organosilicate glasses (OSG) at the…”
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5
Processing assessment and adhesion evaluation of copper through-silicon vias (TSVs) for three-dimensional stacked-integrated circuit (3D-SIC) architectures
Published in Microelectronics and reliability (01-09-2010)“…Through-silicon vias (TSVs) are critical components in most 3D architectures. In this paper, fully filled cylindrical Cu TSVs with a diameter of 5 μm and a…”
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Journal Article Conference Proceeding -
6
Challenges for structural stability of ultra-low- k-based interconnects
Published in Microelectronic engineering (01-07-2004)“…Severe mechanical loads during multilevel metallization manufacturing, such as repeated thermal cycles and chemical–mechanical planarization processes, can…”
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7
Air gap formation by UV-assisted decomposition of CVD material
Published in Microelectronic engineering (01-10-2008)“…A sacrificial material deposited by CVD is used to demonstrate air gap formation in single damascene structures by UV-assisted decomposition. The material is…”
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8
Minimizing plasma damage and in situ sealing of ultralow- k dielectric films by using oxygen free fluorocarbon plasmas
Published in Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures (01-09-2005)“…Ultralow- k nanocrystalline silica films with an open porosity of 30–31% and a pore radius of 0.8–0.9 nm have been etched using oxygen free highly polymerizing…”
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9
Stress corrosion of organosilicate glass films in aqueous environments: Role of pH
Published in Journal of materials research (01-03-2008)“…Subcritical cracking of thin glass films caused by stress-corrosion phenomena cannot be neglected when it comes to application and manufacturing processes that…”
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10
Variation in process conditions of porogen-based low- k films: A method to improve performance without changing existing process steps in a sub-100 nm Cu damascene integration route
Published in Microelectronic engineering (01-03-2010)“…This article describes less explored solutions to improve interconnect performance without changing established steps (etch, strip, clean, CMP) in a sub-100 nm…”
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11
Materials characterization of WNxCy, WNx and WCx films for advanced barriers
Published in Microelectronic engineering (01-11-2007)“…A ternary WNxCy system was deposited in a thermal ALD (atomic layer deposition) reactor from ASM at 300 deg C in a process sequence using tungsten hexafluoride…”
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12
Surface properties restoration and passivation of high porosity ultra low- k dielectric ( k ∼ 2.3) after direct-CMP
Published in Microelectronic engineering (01-11-2007)“…Surface hydrophilisation and effective k-value degradation have been reported in literature after direct-CMP of high porosity SiOC films (without a protective…”
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13
Extent of plasma damage to porous organosilicate films characterized with nanoindentation, x-ray reflectivity, and surface acoustic waves
Published in Journal of materials research (01-12-2006)“…It is known that porous organosilicate glass (OSG) dielectrics tend to lose functional groups and become denser upon the chemical and physical action of the…”
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14
A novel approach to resistivity and interconnect modeling
Published in Microelectronic engineering (01-11-2006)“…This paper describes a simple and novel approach to calculate the line resistance of copper interconnects. The proposed methodology is simply based on a linear…”
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15
Polymer metallization: Low energy ion beam surface modification to improve adhesion
Published in Nuclear instruments & methods in physics research. Section B, Beam interactions with materials and atoms (01-08-1997)“…The interface formation between copper and poly(ethylene terephthalate) (PET) and poly(methyl methacrylate) (PMMA) films is studied in situ by Ion Scattering…”
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16
Study of thermal stability of nickel silicide by X-ray reflectivity
Published in Microelectronic engineering (01-12-2005)“…The thermal stability of Ni silicide, in comparison to the more conventionally used Co silicide, is studied by X-ray reflectivity. These data were complemented…”
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17
On a More Accurate Assessment of Scaled Copper/Low-k Interconnects Performance
Published in IEEE transactions on semiconductor manufacturing (01-08-2007)“…Interconnect RC delay, predominantly affected by the effective dielectric constant (k-value) and by the copper resistivity (rho Cu ), is an important…”
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18
Impact of thinning and through silicon via proximity on High-k / Metal Gate first CMOS performance
Published in 2010 Symposium on VLSI Technology (01-06-2010)“…3D integration has the potential to alleviate the performance limitations that CMOS scaling is facing provided that it preserves the integrity of both front…”
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Conference Proceeding -
19
Characterization of atomic layer deposited nanoscale structure on dense dielectric substrates by X-ray reflectivity
Published in Microelectronic engineering (01-12-2005)“…Interfaces play a crucial role in determining the ultimate properties of nanoscale structures. However, the characterization of such structures is difficult,…”
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Journal Article Conference Proceeding -
20
Comprehensive analysis of the impact of single and arrays of through silicon vias induced stress on high-k / metal gate CMOS performance
Published in 2010 International Electron Devices Meeting (01-12-2010)“…As scaling becomes increasingly difficult, 3D integration has emerged as a viable alternative to achieve the requisite bandwidth and power efficiency…”
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Conference Proceeding