Search Results - "Thuruthiyil, C."
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1
Modeling local variation of low-frequency noise in MOSFETs via sum of lognormal random variables
Published in Proceedings of the IEEE 2012 Custom Integrated Circuits Conference (01-09-2012)“…In this paper, we investigate the geometry dependence for the local variation of low-frequency noise in MOSFETs via the sum of lognormal random variables. A…”
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Conference Proceeding -
2
History-effect-conscious SPICE model extraction for PD-SOI technology
Published in 2004 IEEE International SOI Conference (IEEE Cat. No.04CH37573) (2004)“…This work presents explicit fitting guidelines for AC and DC characteristics, specifically focused on accurate modeling of the history effects in the PD-SOI…”
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Conference Proceeding -
3
SPICE parameter extraction and RO validation of a 65nm SOI technology
Published in 2008 IEEE International SOI Conference (01-10-2008)“…Accurate extraction of the SPICE model parameter is critical in the CMOS IC design. However, it faces difficult issues in state-of-the-art MOSFET technology…”
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Conference Proceeding -
4
Extraction of Self-Heating Free I-V Curves Including the Substrate Current of PD SOI MOSFETs
Published in 2007 IEEE International Conference on Microelectronic Test Structures (01-03-2007)“…A new methodology is proposed to extract self-heating free I-V curves, including the substrate current, of SOI MOSFETs based on triple-temperature, regular DC…”
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Conference Proceeding -
5
Impact of stress on various circuit characteristics in 65nm PDSOI technology
Published in ESSCIRC 2007 - 33rd European Solid-State Circuits Conference (01-09-2007)“…Logic performance is improved by creating more stress in the channel in advanced CMOS technologies. Impact of stress on different circuit blocks in a…”
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Conference Proceeding -
6
Impact of stress on various circuit characteristics in 65nm PDSOI technology
Published in ESSDERC 2007 - 37th European Solid State Device Research Conference (01-09-2007)“…Logic performance is improved by creating more stress in the channel in advanced CMOS technologies. Impact of stress on different circuit blocks in a…”
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Conference Proceeding -
7
Off-state leakage current modeling in low-power/high-performance partially-depleted (PD) floating-body (FB) SOI MOSFETs
Published in 2008 9th International Conference on Solid-State and Integrated-Circuit Technology (01-10-2008)“…Off-state leakage current in a 65 nm partially depleted (PD) floating-body (FB) SOI technology is modeled and analyzed with emphasis on its drain-voltage…”
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Conference Proceeding -
8
Critical current (ICRIT) based SPICE model extraction for SRAM cell
Published in 2008 9th International Conference on Solid-State and Integrated-Circuit Technology (01-10-2008)“…Critical currents (I CRIT ) extracted from the N-curves of a 6-T SRAM bit cell have been shown in recent research to be important and effective figures of…”
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Conference Proceeding -
9
Extraction of speculative SOI MOSFET models using self-heating-free targets
Published in 2008 9th International Conference on Solid-State and Integrated-Circuit Technology (01-10-2008)“…Speculative SPICE models (also referred to as evaluation-level or guess models), which are extracted based on projected device electrical characteristics…”
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Conference Proceeding -
10
Small-signal analytical MOSFET model for microwave frequency applications
Published in Microwave and optical technology letters (05-06-2000)“…A small‐signal analytical MOSFET model suitable for microwave frequency applications is presented. The effect of parasitic elements, the fringing‐field effect,…”
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Journal Article