Search Results - "Thakar, G.V."

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  1. 1
    Short channel effects and delay hysteresis for 0.25 /spl mu/m SOI technology with minimal process changes from the bulk technology

    Short channel effects and delay hysteresis for 0.25 /spl mu/m SOI technology with minimal process changes from the bulk technology by Jacobs, J.B., Unnikrishnan, S., Grider, T., Thakar, G.V., Joyner, K., Eklund, R.H., Houston, T.W.

    “…Partially depleted (PD) SOI technology has been suggested as a method for achieving high performance at low voltage and low power for next generation circuit…”
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  2. 2
    A manufacturable high performance quarter micron CMOS technology using I-line lithography and gate linewidth reduction etch process

    A manufacturable high performance quarter micron CMOS technology using I-line lithography and gate linewidth reduction etch process by Thakar, G.V., McNeil, V.M., Madan, S.K., Riemenschneider, B.R., Rogers, D.M., McKee, J.A., Eklund, R.H., Chapman, R.A.

    “…This paper reports the successful application of I-line lithography to fabricate high performance quarter micron CMOS integrated circuits with good linewidth…”
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  3. 3
    High performance 0.3 /spl mu/m CMOS using I-line lithography and BARC

    High performance 0.3 /spl mu/m CMOS using I-line lithography and BARC by Thakar, G.V., Madan, S.K., Garza, C.M., Krisa, W.L., Nicollian, P.E., Wise, J.L., Lee, C.K., McKee, J.A., Appel, A.T., Esquivel, A.L., McNeil, V.M., Prinslow, D.A., Riemenschneider, B.R., Utsumi, T., Eklund, R.H., Chapman, R.A.

    “…TiN or organic Bottom AntiReflection Coatings (BARC), polysilicon hammerheads, phase shift masks, quadrupole off-axis illumination I-line lithography at…”
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