Search Results - "Taft, R C"
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A 100-MS/s 8-b CMOS subranging ADC with sustained parametric performance from 3.8 V down to 2.2 V
Published in IEEE journal of solid-state circuits (01-03-2001)“…A 100-MS/s 8-b CMOS analog-to-digital converter (ADC) designed for very low supply voltage and power dissipation is presented. This single-ended-input ADC is…”
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2
A 1.8 V 1.0 GS/s 10b Self-Calibrating Unified-Folding-Interpolating ADC With 9.1 ENOB at Nyquist Frequency
Published in IEEE journal of solid-state circuits (01-12-2009)“…An advance in folding-interpolating analog-to-digital converters (ADCs) is demonstrated which simplifies their extension to higher resolution by building the…”
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Journal Article -
3
A 1.8-V 1.6-GSample/s 8-b self-calibrating folding ADC with 7.26 ENOB at Nyquist frequency
Published in IEEE journal of solid-state circuits (01-12-2004)“…This study demonstrates for the first time the significant performance enhancement that calibration brings to folding-interpolating analog-to-digital…”
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4
Demonstration of a p-channel BICFET in the GexSi1-x/Si system
Published in IEEE electron device letters (1989)Get full text
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5
A quadruple well, quadruple polysilicon BiCMOS process for fast 16 Mb SRAM's
Published in IEEE transactions on electron devices (01-12-1994)“…An advanced, high-performance, quadruple well, quadruple polysilicon BiCMOS technology has been developed for fast 16 Mb SRAM's. A split word-line bitcell…”
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6
The SCC BJT: a high-performance bipolar transistor compatible with high-density deep-submicrometer BiCMOS SRAM technologies
Published in IEEE transactions on electron devices (01-07-1995)“…We present the process development and device characterization of the Selectively Compensated Collector (SCC) BJT specifically designed for high-density…”
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7
An eight-terminal Kelvin-tapped bipolar transistor for extracting parasitic series resistances
Published in IEEE transactions on electron devices (01-09-1991)“…A novel DC method for determining the components of series resistance in bipolar transistors is presented. As a DC technique, it shows unprecedented accuracy…”
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8
Design techniques for very low power ADCs
Published in Proceedings of the IEEE 2001 Custom Integrated Circuits Conference (Cat. No.01CH37169) (2001)“…The three low-power ADC techniques of interleaving-by-4 with an amplifier reset and master sampling clock, using self-regulating CMOS push-pull amplifiers, and…”
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Conference Proceeding -
9
Very-low RF noise and high-performance (4.8 fJ) bipolar device in a 0.35 mu m high-density BiCMOS SRAM technology
Published in Digest of technical papers - Symposium on VLSI Technology (01-01-1994)“…This article presents RF and CML performance of a bipolar device integrated into a high-density 0.35 mu m BiCMOS technology specifically designed for fast…”
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10
A scaled, high-performance (4.5 fJ) bipolar device in a 0.35 μm high-density BiCMOS SRAM technology
Published in IEEE electron device letters (01-03-1995)“…We present the performance improvements obtained both by scaling the Selectively Compensated Collector (SCC) BJT and by using a modified Current-Mode Logic…”
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11
GexSi1-x/silicon inversion-base transistors : theory of operation
Published in IEEE transactions on electron devices (01-09-1992)Get full text
Journal Article -
12
GexSi1-x/silicon inversion-base transistors : experimental demonstration
Published in IEEE transactions on electron devices (01-09-1992)Get full text
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13
A 1.8V 1.0GS/s 10b self-calibrating unified-folding-interpolating ADC with 9.1 ENOB at Nyquist frequency
Published in 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers (01-02-2009)“…An advance in folding-interpolating ADCs is presented that simplifies their extension to higher resolution by building the converter out of identical but…”
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Conference Proceeding -
14
Reversibility of clip sterilizations
Published in The Lancet (British edition) (23-10-1982)Get more information
Journal Article -
15
A scaled, high-performance (4.5 fJ) bipolar device in a 0.35 mu mhigh-density BiCMOS SRAM technology
Published in IEEE electron device letters (01-03-1995)“…We present the performance improvements obtained both by scaling the Selectively Compensated Collector (SCC) BJT and by using a modified Current-Mode Logic…”
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Journal Article -
16
Ge(x)Si(1-x)/silicon inversion-base transistors: theory of operation
Published in IEEE transactions on electron devices (01-09-1992)“…A theoretical study of the device characteristics of the Ge(x )Si(1-x)/silicon inversion-base transistor (BICFET) is presented. This transistor uses the space…”
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17
Ge(x)Si(1-x)/silicon inversion-base transistors:experimental demonstration
Published in IEEE transactions on electron devices (01-09-1992)“…The fabrication, material characterization, and electrical evaluation of the p-channel Ge(x)Si(1-x)/silicon inversion-base transistor (BICFET) are described…”
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18
Demonstration of a p-channel BICFET in the Ge sub(x)Si sub(1-x)/Si system
Published in IEEE electron device letters (01-01-1989)“…The first operational bipolar inversion-channel field-effect transistors (BICFET's) based on the Ge sub(x)Si sub(1-x)/Si system have been successfully…”
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19
Demonstration of a p-channel BICFET in the Ge(x)Si(1-x)/Si system ((bipolar inversion-channel field effect transitors))
Published in IEEE electron device letters (01-01-1989)“…Operational bipolar inversion-channel field-effect transistors (BICFETs) based on the Ge(x)Si(1-x)/Si system are discussed. The 300 K current gain of beta =…”
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20
A novel DC measurement method for the accurate extraction of bipolar resistive parasitics
Published in International Technical Digest on Electron Devices (1990)“…A novel DC method for determining the components of series resistance in bipolar transistors is presented. As a DC technique, it shows unprecedented accuracy…”
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Conference Proceeding