Search Results - "TAKAGIWA, Teruo"
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A 1.33-Tb 4-Bit/Cell 3-D Flash Memory on a 96-Word-Line-Layer Technology
Published in IEEE journal of solid-state circuits (01-01-2020)“…A 1.33-Tb 4-bit/cell quadruple-level (QLC) 3-D flash memory in a 96-word-line (WL)-layer technology that achieves 8.5 Gb/mm 2 has been developed. This is the…”
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Journal Article -
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A 512Gb 3b/Cell 3D flash memory on a 96-word-line-layer technology
Published in 2018 IEEE International Solid - State Circuits Conference - (ISSCC) (01-02-2018)“…The first multi-layer stacked 3D Flash memory was proposed as BiCS FLASH in 2007 [1]. Since then, memory bit density has grown rapidly due to the increase in…”
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Conference Proceeding -
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30.4 A 1Tb 3b/Cell 3D-Flash Memory in a 170+ Word-Line-Layer Technology
Published in 2021 IEEE International Solid- State Circuits Conference (ISSCC) (13-02-2021)“…This work demonstrates a novel 1Tb 3D Flash memory chip that has an area efficiency of 10.4Gb/mm 2 in a 3b/cell technology. Using a circuit under array (CUA)…”
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Conference Proceeding -
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A 151-mm ^ 64-Gb 2 Bit/Cell NAND Flash Memory in 24-nm CMOS Technology
Published in IEEE journal of solid-state circuits (01-01-2012)“…A 64-Gb MLC (2 bit/cell) NAND flash memory with the highest memory density to date as an MLC flash memory, has been successfully developed. To decrease the…”
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Journal Article -
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A 151-mm 2 64-Gb 2 Bit/Cell NAND Flash Memory in 24-nm CMOS Technology
Published in IEEE journal of solid-state circuits (01-01-2012)“…A 64-Gb MLC (2 bit/cell) NAND flash memory with the highest memory density to date as an MLC flash memory, has been successfully developed. To decrease the…”
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Journal Article -
6
A 151-mm2 64-Gb 2 Bit/Cell NAND Flash Memory in 24-nm CMOS Technology
Published in IEEE journal of solid-state circuits (2012)Get full text
Conference Proceeding -
7
A 151mm2 64Gb MLC NAND flash memory in 24nm CMOS technology
Published in 2011 IEEE International Solid-State Circuits Conference (01-02-2011)“…NAND flash memories are now indispensable for our modern lives. The application range of the storage memory devices began with digital still cameras and has…”
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Conference Proceeding -
8
A signal dependent clock feedthrough cancellation technique for switched current circuits
Published in Electronics & communications in Japan. Part 2, Electronics (01-09-1997)“…In this paper, a signal dependent clock feedthrough cancellation technique for SI is proposed. It is difficult to cancel signal‐dependent clock feedthrough in…”
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Journal Article