Search Results - "TAI-JU CHEN"

A 14-nm FinFET Logic CMOS Process Compatible RRAM Flash With Excellent Immunity to Sneak Path by Hsieh, E. Ray, Yen Chen Kuo, Chih-Hung Cheng, Jing Ling Kuo, Meng-Ru Jiang, Jian-Li Lin, Hung-Wen Chen, Chung, Steve S., Chuan-Hsi Liu, Tse Pu Chen, Shih An Huang, Tai-Ju Chen, Cheng, Osbert

“…In this paper, we have demonstrated an oxygen-vacancy-based bipolar RRAM on a pure logic 14-nm-node HKMG FinFET platform. A unit cell of the memory consists of…”
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An Experimental Approach to Characterizing the Channel Local Temperature Induced by Self-Heating Effect in FinFET by Hsieh, E Ray, Jiang, Meng-Ru, Lin, Jian-Li, Chung, Steve S., Chen, Tse Pu, Huang, Shih An, Chen, Tai-Ju, Cheng, Osbert

“…In this paper, we have developed a methodology of a lateral profiling technique of the channel local temperature in 14 nm FinFET, incurred by the self-heating…”
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Application of plasma immersion ion implantation doping to low-temperature processed poly-Si TFTs by Ching-Fa Yeh, Tai-Ju Chen, Chung Liu, Jiqun Shao, Cheung, N.W.

“…This work applied, for the first time, plasma immersion ion implantation (PIII) for source/drain doping on low-temperature processed polysilicon thin-film…”
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Novel gate dielectric films formed by ion plating for low-temperature-processed polysilicon TFTs by Yeh, Ching-Fa, Chen, Tai-Ju, Fan, Ching-Lin, Kao, Jiann-Shiun

“…A novel SiO/sub 2/ film formed by ion plating (IP) at room temperature was developed for low-temperature-processed (LTP) (<625/spl deg/C) polysilicon thin-film…”
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Experimental comparison of off-state current between high-temperature- and low-temperature-processed undoped channel polysilicon thin-film transistors by Yeh, Ching-Fa, Yang, Tzung-Zu, Chen, Chun-Lin, Yang, Tai-Ju Chen

“…Poly-Si thin-film transistors (TFT's) have a large off-state current that is unacceptable for pixel driver application. To quickly establish an effective…”
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Physical characteristics of N2 annealing on room-temperature-deposited ion plating oxide by Yeh, Ching-Fa, Chen, Tai-Ju, Kao, Jiann-Shiun

“…The effects of N2 annealing on the physical properties of room-temperature-deposited ion plating (IP) oxide have been characterized. As-deposited IP oxide…”
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Characteristics of self-induced lightly-doped-drain polycrystalline silicon thin film transistors with liquid-phase deposition SiO2 as gate-insulator and passivation-layer by CHING-FA YEH, TZUNG-ZU YANG, TAI-JU CHEN

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The performance and reliability of self-induced lightly-doped-drain polysilicon thin film transistors by Ching-Fa Yeh, Tai-Ju Chen, Tzung-Zu Yang

“…A novel polycrystalline silicon thin film transistor (poly-Si TFT) with high ON/OFF current ratio independent of gate bias is developed. We call this device…”
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Hydrogenation of polysilicon thin-film transistor in a planar inductive H/sub 2//Ar discharge by Ching-Fa Yeh, Tai-Ju Chen, Chung Liu, Gudmundsson, J.T., Lieberman, M.A.

“…A planar inductive discharge is used to hydrogenate polysilicon thin-film transistors (poly-Si TFTs). Experimental results indicate that inductive discharges…”
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Hydrogenation of polysilicon thin-film transistor in a planarinductive H(2)/Ar discharge by Yeh, Ching-Fa, Chen, Tai-Ju, Liu, Chung, Gudmundsson, J T, Lieberman, M A

“…A planar inductive discharge is used to hydrogenate polysilicon thin-film transistors (poly-Si TFTs). Experimental results indicate that inductive discharges…”
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Highly Reliable Liquid-Phase-Deposited SiO 2 with Nitrous Oxide Plasma Post-Treatment for Low-Temperature-Processed Polysilicon Thin Film Transistors by Yeh, Ching-Fa, Chen, Darren Chi-Hsiang, Lu, Cheng-Yu, Liu, Chung, Lee, Su-Tseng, Liu, Cheng-Hong, Chen, Tai-Ju

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Characteristics of self-induced lightly-doped-drain polycrystalline silicon thin film transistors with liquid-phase deposition SiO/sub 2/ as gate-insulator and passivation-layer by Ching-Fa Yeh, Tzung-Zu Yang, Tai-Ju Chen

“…As the passivation layer on the top of undoped offset region for offset-gate structured poly-Si TFTs is exposed to hydrogen plasma, a lightly-doped-like drain…”
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Characteristics of self-induced lightly-doped-drain polycrystallinesilicon thin film transistors with liquid-phase deposition SiO(2) as gate-insulator and passivation-layer by Yeh, Ching-Fa, Yang, Tzung-Zu, Chen, Tai-Ju

“…As the passivation layer on the top of undoped offset region for offset-gate structured poly-Si TFTs is exposed to hydrogen plasma, a lightly-doped-like drain…”
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Hydrogenation of polysilicon thin-film transistor in a planar inductive H sub(2)/Ar discharge by Yeh, Ching-Fa, Chen, Tai-Ju, Liu, Chung, Gudmundsson, Jon T, Lieberman, Michael A

“…A planar inductive discharge is used to hydrogenate polysilicon thin-film transistors (poly-Si TFT's). Experimental results indicate that inductive discharges…”
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HIGHLY RELIABLE LIQUID-PHASE-DEPOSITED SiO2 WITH NITROUS OXIDE PLASMA POST-TREATMENT FOR LOW-TEMPERATURE-PROCESSED POLYSILICON THIN FILM TRANSISTORS by Yeh, C-F, Chen, D C-H, Lu, C-Y, Liu, C, Lee, S-T, Liu, C-H, Chen, T-J

“…Low-temperature (approximately 300 C) N2O-plasma post-treatment for liquid-phase-deposited (LPD) gate oxide has been proposed for the first time. This…”
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Passivation effects of ion plating capping oxide on poly-Si TFTs by Ching-Fa Yeh, Tai-Ju Chen, Jiann-Shiun Kao

“…The reduction of defect density in poly-Si active layers is an important issue to improve poly-Si TFT performance. A novel method has been developed for…”
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