Search Results - "Suk-Kyu Ryu"
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Characterization of thermal stresses in through-silicon vias for three-dimensional interconnects by bending beam technique
Published in Applied physics letters (23-01-2012)“…Through-silicon via is a critical element for three-dimensional (3D) integration of devices in multilevel stack structures. Thermally induced stresses in…”
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Journal Article -
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Measurement and analysis of thermal stresses in 3D integrated structures containing through-silicon-vias
Published in Microelectronics and reliability (01-01-2013)“…Three-dimensional (3-D) integration with through-silicon-vias (TSVs) has emerged as an effective approach to overcome the wiring limit beyond the 32nm…”
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Journal Article -
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A kinetic decomposition process for air-gap interconnects and induced deformation instability of a low-k dielectric cap layer
Published in Journal of mechanical science and technology (2014)“…During air-gap formation in interconnects, decomposition process of the sacrificial layer induces deformation of a low-k dielectric cap layer. For analysis of…”
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Journal Article -
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A three-dimensional model of fluid–structural interactions for quantifying the contractile force for cardiomyocytes on hybrid biopolymer microcantilever
Published in Journal of biomechanics (01-01-2007)“…Abstract Quantitatively analysis of the contractility of cardiomyocytes is important for understanding the mechanism of heart failure as well as the molecular…”
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Journal Article -
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Thermo-mechanical reliability of 3-D ICs containing through silicon vias
Published in 2009 59th Electronic Components and Technology Conference (01-05-2009)“…In 3-D interconnect structures, process-induced thermal stresses around through-silicon-vias (TSVs) raise serious reliability issues such as Si cracking and…”
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Conference Proceeding
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Thermal stress induced delamination of through silicon vias in 3-D interconnects
Published in 2010 Proceedings 60th Electronic Components and Technology Conference (ECTC) (01-06-2010)“…In this paper we investigated the interfacial delamination of through silicon via (TSV) structures under thermal cycling or processing. First finite element…”
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Conference Proceeding -
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Thermomechanical reliability of through-silicon vias in 3D interconnects
Published in 2011 International Reliability Physics Symposium (01-04-2011)“…This paper investigates two key aspects of thermomechanical reliability of through-silicon vias (TSV) in 3D interconnects. One is the piezoresistivity effect…”
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Conference Proceeding -
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Impact of material and microstructure on thermal stresses and reliability of through-silicon via (TSV) structures
Published in 2013 IEEE International Interconnect Technology Conference - IITC (01-06-2013)“…Thermal stresses and microstructures of two TSV structures with different fabrication conditions have been investigated using the precision wafer curvature and…”
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Conference Proceeding -
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A fast simulation framework for full-chip thermo-mechanical stress and reliability analysis of through-silicon-via based 3D ICs
Published in 2011 IEEE 61st Electronic Components and Technology Conference (ECTC) (01-05-2011)“…In this work, we propose an efficient and accurate full-chip thermo-mechanical stress and reliability analysis framework. To the best of our knowledge this is…”
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Conference Proceeding -
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Temperature-dependent thermal stress determination for through-silicon-vias (TSVs) by combining bending beam technique with finite element analysis
Published in 2011 IEEE 61st Electronic Components and Technology Conference (ECTC) (01-05-2011)“…In this paper, temperature-dependent thermal stresses in Cu TSVs are measured by combining the bending beam experiment with a finite element analysis (FEA)…”
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Conference Proceeding -
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Thermal stress characteristics and impact on device keep-out zone for 3-D ICs containing through-silicon-vias
Published in 2012 Symposium on VLSI Technology (VLSIT) (01-06-2012)“…Thermal stresses in TSV structures have been measured using micro-Raman spectroscopy and precision wafer curvature technique as a function of temperature and…”
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Conference Proceeding -
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Measurement and analysis of thermal stresses in 3-D integrated structures containing through-silicon-vias
Published in 2012 IEEE International Interconnect Technology Conference (01-06-2012)“…In this work, experimental measurements and numerical analysis of the thermal stresses in TSV structures are presented. The stresses are measured using the…”
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Conference Proceeding -
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Realistic computational modeling for hybrid biopolymer microcantilevers
Published in 2006 International Conference of the IEEE Engineering in Medicine and Biology Society (2006)“…Three dimensional cultures in a microfabricated environment provide in vivo-like conditions to cells, and have used in a variety of applications in basic and…”
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Conference Proceeding Journal Article -
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Impact of Near-Surface Thermal Stresses on Interfacial Reliability of Through-Silicon Vias for 3-D Interconnects
Published in IEEE transactions on device and materials reliability (01-03-2011)“…Continual scaling of on-chip wiring structures has brought significant challenges for materials and processes beyond the 32-nm technology node in…”
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Magazine Article -
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Effect of Thermal Stresses on Carrier Mobility and Keep-Out Zone Around Through-Silicon Vias for 3-D Integration
Published in IEEE transactions on device and materials reliability (01-06-2012)“…Three-dimensional (3-D) integration with through-silicon vias (TSVs) has emerged as an effective solution to overcome the wiring limit imposed on device…”
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Magazine Article -
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The dependence of contractile force for the cardiomyocytes on a different engineered surface
Published in IEEE Sensors, 2005 (2005)“…We present a microfabricated three-dimensional (3-D) hybrid biopolymer microcantilever which can measure the contractile force of cardiomyocytes and analyze…”
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Conference Proceeding -
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Impact of Process Induced Stresses and Chip-Packaging Interaction on Reliability of Air-gap Interconnects
Published in 2008 International Interconnect Technology Conference (01-06-2008)“…The mechanical stability of air-gap interconnect structures during thermal processing and under chip packaging interaction (CPI) were investigated using 3D…”
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Conference Proceeding -
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Thermal stress characteristics and reliability impact on 3-D ICs containing through-silicon-vias
Published in 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology (01-10-2012)“…Thermal stresses in TSV structures have been measured using micro-Raman spectroscopy and precision wafer curvature technique as a function of temperature and…”
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Conference Proceeding -
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Thermomechanical Failure Analysis of Through-Silicon Via Interface Using a Shear-Lag Model With Cohesive Zone
Published in IEEE transactions on device and materials reliability (01-03-2014)“…An analytical approach to predict initiation and growth of interfacial delamination in the through-silicon via structure is developed by combining a cohesive…”
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Magazine Article