Search Results - "Stoppino, Pier Paolo"

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  1. 1
    A Reduced Output Ringing CMOS Buffer

    A Reduced Output Ringing CMOS Buffer by Bartolini, M., Pulici, P., Stoppino, P.P., Campardo, G., Vanalli, G.P.

    “…In a multichip module, the parasitic elements of the interconnections influence the performance of the devices enclosed in the package. Phenomena such as…”
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    System in Package Feasibility Process : This procedure and software process aims at rapid time-to-market and the ability to make use of many different component combinations: 3-D Integration Technologies

    System in Package Feasibility Process : This procedure and software process aims at rapid time-to-market and the ability to make use of many different component combinations: 3-D Integration Technologies by PAOLO STOPPINO, Pier, CONCI, Armando, LESSIO, Tito, FERRARA, Davide

    Published in Proceedings of the IEEE (2009)
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    System in Package Feasibility Process

    System in Package Feasibility Process by Stoppino, Pier Paolo, Conci, Armando, Lessio, Tito, Ferrara, Davide

    Published in Proceedings of the IEEE (01-01-2009)
    “…This paper describes the procedure and the software process to verify the feasibility of a system in package. The process has been created to guarantee and…”
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