Search Results - "Stoppino, P.P."

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  1. 1

    System in Package Feasibility Process by Stoppino, Pier Paolo, Conci, Armando, Lessio, Tito, Ferrara, Davide

    Published in Proceedings of the IEEE (01-01-2009)
    “…This paper describes the procedure and the software process to verify the feasibility of a system in package. The process has been created to guarantee and…”
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    Journal Article
  2. 2

    A Reduced Output Ringing CMOS Buffer by Bartolini, M., Pulici, P., Stoppino, P.P., Campardo, G., Vanalli, G.P.

    “…In a multichip module, the parasitic elements of the interconnections influence the performance of the devices enclosed in the package. Phenomena such as…”
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    Journal Article
  3. 3

    Interconnection effects in Package on Package design by Pulici, P., Candela, G., Campardo, G., Vanalli, G.P., Stoppino, P.P., Losavio, A., Lessio, T., Dellutri, M., Guarnaccia, D., Lo Iacono, F.

    “…The PoP (Package on Package) design procedure is described in this paper, focusing principally on the constraints and the system characteristics. The PoP…”
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    Conference Proceeding