Search Results - "Stan, M.R"

HotSpot: a compact thermal modeling methodology for early-stage VLSI design by Wei Huang, Ghosh, S., Velusamy, S., Sankaranarayanan, K., Skadron, K., Stan, M.R.

“…This paper presents HotSpot-a modeling methodology for developing compact thermal models based on the popular stacked-layer packaging scheme in modern very…”
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Molecular electronics: from devices and interconnect to circuits and architecture by Stan, M.R., Franzon, P.D., Goldstein, S.C., Lach, J.C., Ziegler, M.M.

“…As the dominating CMOS technology is fast approaching a "brick wall," new opportunities arise for competing solutions. Nanoelectronics has achieved several…”
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Accurate, Pre-RTL Temperature-Aware Design Using a Parameterized, Geometric Thermal Model by Wei Huang, Sankaranarayanan, K., Skadron, K., Ribando, R.J., Stan, M.R.

“…Preventing silicon chips from negative, even disastrous thermal hazards has become increasingly challenging these days; considering thermal effects early in…”
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CMOS/nano co-design for crossbar-based molecular electronic systems by Ziegler, M.M., Stan, M.R.

“…Future electronic systems will need to adopt novel nanoelectronic solutions to keep pace with Moore's Law. Crossbar-based molecular electronics are among the…”
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A Programmable Majority Logic Array Using Molecular Scale Electronics by Rose, G.S., Stan, M.R.

“…In recent years, many advances have been made in the development of molecular scale electronics which have inspired interest in using the devices thereof for…”
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Interconnect Lifetime Prediction for Reliability-Aware Systems by Zhijian Lu, Wei Huang, Stan, M.R., Skadron, K., Lach, J.

“…Thermal effects are becoming a limiting factor in high-performance circuit design due to the strong temperature dependence of leakage power, circuit…”
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Parameterized physical compact thermal modeling by Wei Huang, Stan, M.R., Skadron, K.

“…This paper presents a compact thermal modeling (CTM) approach, which is fully parameterized according to design geometries and material physical properties…”
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Conformational Molecular Switches for Post-CMOS Nanoelectronics by Kaloyeros, A.E., Stan, M.R., Arkles, B., Geer, R., Eisenbraun, E.T., Raynolds, J.E., Gadre, A., Yongqiang Xue, Ryan, J.

“…Theoretical treatments forecast that bistable CMOS devices using electronic charge as a state variable will operate at their maximum thermal dissipation limit…”
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Low-power CMOS with subvolt supply voltages by Stan, M.R.

“…We first present a circuit taxonomy along the space and time dimensions, which is useful for classifying generic low-power techniques, followed by an analysis…”
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Large-signal two-terminal device model for nanoelectronic circuit analysis by Rose, G.S., Ziegler, M.M., Stan, M.R.

“…As the nanoelectronics field reaches the maturity needed for circuit-level integration, modeling approaches are needed that can capture nonclassical behaviors…”
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Split-path skewed (SPS) CMOS buffer for high performance and low power applications by Hamzaoglu, F., Stan, M.R.

“…Splitting a regular multistage CMOS buffer into two separate paths, and then skewing each path in opposite directions to achieve faster delay leads to a new,…”
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Control-theoretic techniques and thermal-RC modeling for accurate and localized dynamic thermal management by Skadron, K., Abdelzaher, T., Stan, M.R.

“…This paper proposes the use of formal feedback control theory as a way to implement adaptive techniques in the processor architecture. Dynamic thermal…”
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Bus-invert coding for low-power I/O by Stan, M.R., Burleson, W.P.

“…Technology trends and especially portable applications drive the quest for low-power VLSI design. Solutions that involve algorithmic, structural or physical…”
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Power-aware computing by Stan, M.R., Skadron, K.

“…Performance, complexity, cost, and power tradeoffs have created exciting challenges and opportunities in the rapidly changing field of power-aware computing…”
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Compact thermal modeling for temperature-aware design by Huang, Wei, Stan, Mircea R., Skadron, Kevin, Sankaranarayanan, Karthik, Ghosh, Shougata, Velusam, Sivakumar

“…Thermal design in sub-100nm technologies is one of the major challenges to the CAD community. In this paper, we first introduce the idea of temperature-aware…”
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Temperature-aware computer systems: Opportunities and challenges by Skadron, K., Stan, M.R., Wei Huang, Velusamy, S., Sankaranarayanan, K., Tarjan, D.

“…Temperature-aware design techniques have an important role to play in addition to traditional techniques like power-aware design and package- and board-level…”
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Intra-disk Parallelism: An Idea Whose Time Has Come by Sankar, Sriram, Gurumurthi, Sudhanva, Stan, Mircea R.

“…Server storage systems use a large number of disks to achieve high performance, thereby consuming a significant amount of power. In this paper, we propose to…”
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Improved thermal management with reliability banking by Lu, Z., Lach, J., Stan, M.R., Skadron, K.

“…Using a fixed temperature for thermal throttling is pessimistic. Reduced aging during periods of low temperature can compensate for accelerated aging during…”
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CMOS circuits with subvolt supply voltages by Stan, M.R.

“…This overview of multiple-voltage use in low-power design proposes a circuit taxonomy to help determine the most effective low-power techniques for specific…”
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Sensitivity-Based Optimization of Disk Architecture by Sankar, Sriram, Zhang, Yan, Gurumurthi, Sudhanva, Stan, Mircea R.

“…Storage plays a pivotal role in the performance of many applications. Many applications, especially those that run on servers, are I/O intensive and therefore…”
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