Search Results - "Stadele, M."

Transport mechanisms in atomic-layer-deposited Al2O3 dielectrics by Specht, M., Städele, M., Jakschik, S., Schröder, U.

“…We analyze the field and temperature dependence of electron currents through atomic-layer-deposited thin (3.6–6 nm) sheets of Al2O3 which were annealed above…”
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Exact Kohn-Sham Exchange Potential in Semiconductors by Städele, M., Majewski, J. A., Vogl, P., Görling, A.

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Metallization of molecular hydrogen: predictions from exact-exchange calculations by Städele, M, Martin, R M

“…We study metallization of molecular hydrogen under pressure using exact-exchange (EXX) Kohn-Sham density-functional theory in order to avoid well-known…”
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Influence of crystal orientation and body doping on trigate transistor performance by Landgraf, E., Rösner, W., Städele, M., Dreeskornfeld, L., Hartwich, J., Hofmann, F., Kretz, J., Lutz, T., Luyken, R.J., Schulz, T., Specht, M., Risch, L.

“…This work characterizes long channel trigate transistors with respect to the systematic influence of crystal orientation and body doping on performance issues…”
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Novel dual bit tri-gate charge trapping memory devices by Specht, M., Kommling, R., Hofmann, F., Klandzievski, V., Dreeskornfeld, L., Weber, W., Kretz, J., Landgraf, E., Schulz, T., Hartwich, J., Rosner, W., Stadele, M., Luyken, R.J., Reisinger, H., Graham, A., Hartmann, E., Risch, L.

“…Dual bit operation of fabricated tri-gate nonvolatile memory devices with aggressively scaled oxide-nitride-oxide (ONO) dielectrics is presented for the first…”
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Full band approach to tunneling in MOS structures by Sacconi, F., Di Carlo, A., Lugli, P., Stadele, M., Jancu, J.-M.

“…Using atomistic quantum mechanical tight-binding (TB) methods that include the full band structure, we study electron tunneling through three-dimensional…”
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Stability and band offsets of polar GaN/SiC(001) and AlN/SiC(001) interfaces by Städele, M., Majewski, J. A., Vogl, P.

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Nanoscale FinFETs for low power applications by Rösner, W., Landgraf, E., Kretz, J., Dreeskornfeld, L., Schäfer, H., Städele, M., Schulz, T., Hofmann, F., Luyken, R.J., Specht, M., Hartwich, J., Pamler, W., Risch, L.

“…N and p channel FinFETs with fin widths in the range of 15–30 nm and gate lengths down to 20 nm have been processed using e-beam-lithography and nano-etching…”
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Fabrication of ultra-thin-film SOI transistors using the recessed channel concept by Dreeskornfeld, L., Hartwich, J., Hofmann, F., Kretz, J., Landgraf, E., Luyken, R.J., Rösner, W., Schröter, R., Schulz, T., Specht, M., Städele, M., Weber, W., Risch, L.

“…In this article, ultra-thin-film SOI transistors fabricated by locally recessing the channel regions are presented. SOI MOSFETs with ultra-thin channels offer…”
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Impact of technology parameters on device performance of UTB-SOI CMOS by Schulz, T., Pacha, C., Luyken, R.J., Städele, M., Hartwich, J., Dreeskornfeld, L., Landgraf, E., Kretz, J., Rösner, W., Specht, M., Hofmann, F., Risch, L.

“…Ultra-thin-body silicon-on-insulator (UTB-SOI) is one of the most promising candidates for future CMOS technologies with minimum feature sizes below 50 nm. In…”
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Resonant electron tunneling through defects in ultrathin SiO2 gate oxides in MOSFETs by Städele, M., Fischer, B., Tuttle, B.R., Hess, K.

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Simulation of nanoscale MOSFETs using modified drift-diffusion and hydrodynamic models and comparison with Monte Carlo results by Granzner, R., Polyakov, V.M., Schwierz, F., Kittler, M., Luyken, R.J., Rösner, W., Städele, M.

“…The dc behavior of single-gate and double-gate MOSFETs with gate lengths ranging from 5 to 100 nm is simulated using drift-diffusion, hydrodynamic, and Monte…”
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Sub-40nm tri-gate charge trapping nonvolatile memory cells for high-density applications by Specht, M., Kommling, R., Dreeskornfeld, L., Weber, W., Hofmann, F., Alvarez, D., Kretz, J., Luyken, R.J., Rosner, W., Reisinger, H., Landgraf, E., Schulz, T., Hartwich, J., Stadele, M., Klandievski, V., Hartmann, E., Risch, L.

“…Fully-depleted tri-gate oxide-nitride-oxide (ONO) transistor memory cells with very short gate lengths in the range L/sub G/ = 30 - 80 nm have been fabricated…”
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Prospects of Ga/In/Al-N Nanometer Devices: Electronic Structure, Scattering Rates, and High Field Transport by Zandler, G., Majewski, J. A., Städele, M., Vogl, P., Compagnone, F.

“…Employing first principles electronic structure calculations, we predict electronic band parameters in wide gap nitrides that are relevant for high field…”
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Drain leakage mechanisms in fully depleted SOI devices with undoped channel [MOSFETs] by Luyken, R.J., Specht, M., Rosner, W., Hartwich, J., Hofmann, F., Dreeskornfeld, L., Landgraf, E., Schulz, T., Stadele, M., Kretz, J., Risch, L.

“…The leakage mechanisms in fully depleted (FD) SOI transistors with undoped channel are investigated. These devices - contrary to partially depleted devices -…”
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Planar double gate transistors with asymmetric independent gates by Ilicali, G., Weber, W., Rosner, W., Dreeskornfeld, L., Hartwich, J., Kretz, J., Lutz, T., Mazellier, J.-P., Stadele, M., Specht, M., Luyken, J.R., Landgraf, E., Hofmann, F., Risch, L., Kasmaier, R., Hansch, W.

“…Planar double-gate field effect transistors with asymmetric (p++/n++) independent gates down to 55nm physical gate lengths are successfully fabricated. A…”
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Impact ionization and band-to-band tunneling in ultrathin body SOI devices with undoped channels by Luyken, Hartwich, Specht, Dreeskornfeld, Stadele, Rosner, Hofmann, Landgraf, Schulz, Kretz, Risch

“…In this paper, we investigate leakage currents due to impact ionization and band-to-band tunneling effects in FD SOI transistors using energy balance…”
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NVM based on FinFET device structures by Hofmann, F., Specht, M., Dorda, U., Kömmling, R., Dreeskornfeld, L., Kretz, J., Städele, M., Rösner, W., Risch, L.

“…High density data flash memories are essentially used in mobile applications. Flash devices have a small form factor, high storage density and low power…”
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High resolution 2D Scanning Spreading Resistance Microscopy (SSRM) of thin film SOI MOSFETs with ultra short effective channel length by Hartwich, Alvarez, Dreeskornfeld, Hofmann, Kretz, Landgraf, Luyken, Rosner, Schultz, Specht, Stadele, Vandervorst, Risch

“…This work reports a comparative study of the electrical and analytical characterisation of nanoscaled ultrathin SOI transistors. The devices are fabricated on…”
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20 nm tri-gate SONOS memory cells with multi-level operation by Specht, M., Dorda, U., Dreeskornfeld, L., Kretz, J., Hofinann, F., Stadele, M., Luyken, R.J., Rosner, W., Reisinger, H., Landgraf, E., Schulz, T., Hartwich, J., Kommling, R., Risch, L.

“…Fast programmable tri-gate oxide-nitride-oxide (ONO) transistor memory cells with sub-10 nm fin width and gate lengths down to L/sub G/ = 20 nm have been…”
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