Search Results - "Sowariraj, M.S.B." :: Katalog Arama

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Role of package parasitics and substrate resistance on the Charged Device Model (CDM) failure levels –An explanation and die protection strategy by Sowariraj, M.S.B., Smedes, Theo, Salm, Cora, Mouthaan, Ton, Kuper, Fred G

Published in Microelectronics and reliability (01-09-2003)

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The influence of technology variation on ggNMOSTs and SCRs against CDM BSD stress by Sowariraj, M.S.B., Salm, Cora, Mouthaan, Ton, G Kuper, Fred, Smedes, Theo

Published in Microelectronics and reliability (01-09-2002)

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A 3-D Circuit Model to evaluate CDM performance of ICs by Sowariraj, M.S.B., Smedes, Theo, de Jong, Peter C., Salm, Cora, Mouthaan, Ton, Kuper, Fred G

Published in Microelectronics and reliability (01-09-2005)
“…This paper presents a physical description of the static charge flow through an IC during a CDM event. Based on this description, an equivalent 3-D circuit to…”

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Significance of including substrate capacitance in the full chip circuit model of ICs under CDM stress by Sowariraj, M.S.B., de Jong, P.C., Cora, S.M., Smedes, T., Mouthaan, A.J.T., Kuper, F.G.

Published in 2005 IEEE International Reliability Physics Symposium, 2005. Proceedings. 43rd Annual (2005)
“…In the CDM type of ESD, the IC is both the source and part of the discharge current path. To study the CDM performance of an IC, a full-chip circuit model that…”

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