Search Results - "Song, Taejoong"

A 10 nm FinFET 128 Mb SRAM With Assist Adjustment System for Power, Performance, and Area Optimization by Song, Taejoong, Rim, Woojin, Park, Sunghyun, Kim, Yongho, Yang, Giyong, Kim, Hoonki, Baek, Sanghoon, Jung, Jonghoon, Kwon, Bongjae, Cho, Sungwee, Jung, Hyuntaek, Choo, Yongjae, Choi, Jaeseung

“…Two 128 Mb 6T SRAM test chips are implemented in a 10 nm FinFET technology. A 0.040 μm 2 6T SRAM bitcell is designed for high density (HD), and 0.049 μm 2 for…”
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Embedded MRAM Macro for eFlash Replacement by Antonyan, Artur, Suksoo Pyo, Hyuntaek Jung, Taejoong Song

“…In this paper, we have presented 28-nm embedded 8Mb 64 I/O Spin-Transfer-Torque Magnetic RAM (STT-MRAM) Macro. Besides being the one of the world's first mass…”
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Bitline Charge-Recycling SRAM Write Assist Circuitry for V} Improvement and Energy Saving by Jeong, Hanwool, Oh, Se Hyeok, Oh, Tae Woo, Kim, Hoonki, Park, Chang Nam, Rim, Woojin, Song, Taejoong, Jung, Seong-Ook

“…Bitline (BL) charge-recycling-based static random access memory (SRAM) write assist circuits (BCR-WA) are proposed to reduce the minimum operating voltage (V…”
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A 7nm FinFET SRAM using EUV lithography with dual write-driver-assist circuitry for low-voltage applications by Taejoong Song, Jonghoon Jung, Woojin Rim, Hoonki Kim, Yongho Kim, Changnam Park, Jeongho Do, Sunghyun Park, Sungwee Cho, Hyuntaek Jung, Bongjae Kwon, Hyun-Su Choi, JaeSeung Choi, Jong Shik Yoon

“…SRAM plays an integral role in the power, performance, and area of a mobile system-on-a-chip. To achieve low power and high density, extreme ultraviolet (EUV)…”
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An Embedded Level-Shifting Dual-Rail SRAM for High-Speed and Low-Power Cache by Kim, Tae Hyun, Jeong, Hanwool, Park, Juhyun, Kim, Hoonki, Song, Taejoong, Jung, Seong-Ook

“…An embedded level-shifting (ELS) dual-rail SRAM is proposed to enhance the availability of dual-rail SRAMs. Although dual-rail SRAM is a powerful solution for…”
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Offset-Compensated Cross-Coupled PFET Bit-Line Conditioning and Selective Negative Bit-Line Write Assist for High-Density Low-Power SRAM by Jeong, Hanwool, Kim, Taewon, Yang, Younghwi, Song, Taejoong, Kim, Gyuhong, Won, Hyo-sig, Jung, Seong-Ook

“…An offset-compensated cross-coupled PFET bit-line (BL) conditioning circuit (OC-CPBC) and a selective negative BL write-assist circuit (SNBL-WA) are proposed…”
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Trip-Point Bit-Line Precharge Sensing Scheme for Single-Ended SRAM by Jeong, Hanwool, Kim, Taewon, Song, Taejoong, Kim, Gyuhong, Jung, Seong-Ook

“…A trip-point bit-line precharge (TBP) sensing scheme is proposed for high-speed single-ended static random-access memory (SRAM). This TBP scheme mitigates the…”
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24.3 A 3nm Gate-All-Around SRAM Featuring an Adaptive Dual-BL and an Adaptive Cell-Power Assist Circuit by Song, Taejoong, Rim, Woojin, Kim, Hoonki, Cho, Keun Hwi, Kim, Taeyeong, Lee, TaeJung, Bae, Geumjong, Kim, Dong-Won, Kwon, SD, Baek, Sanghoon, Jung, Jonghoon, Kye, Jongwook, Jung, Hakchul, Kim, Hyungtae, Jung, Soon-Moon, Park, Jaehong

“…Advanced technologies help to improve SRAM performance via recent transistor breakthroughs [1], which allow SRAM designers to focus on handling metal…”
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A Fully Integrated UHF-Band CMOS Receiver With Multi-Resolution Spectrum Sensing (MRSS) Functionality for IEEE 802.22 Cognitive Radio Applications by Jongmin Park, Taejoong Song, Joonhoi Hur, Sang Min Lee, Jungki Choi, Kihong Kim, Kyutae Lim, Chang-Ho Lee, Haksun Kim, Laskar, J.

“…Fast and accurate spectrum sensing is one of the most important functions in a cognitive radio (CR) seeking to use the licensed but unoccupied spectrum…”
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Switching pMOS Sense Amplifier for High-Density Low-Voltage Single-Ended SRAM by Jeong, Hanwool, Kim, Taewon, Kang, Kyoman, Song, Taejoong, Kim, Gyuhong, Won, Hyo-sig, Jung, Seong-Ook

“…A switching pMOS sense amplifier (SPSA) is proposed for high-speed single-ended static RAM sensing. By using the same pull-up pMOS transistor for sensing and…”
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Bitline Precharging and Preamplifying Switching pMOS for High-Speed Low-Power SRAM by Jeong, Hanwool, Park, Juhyun, Oh, Tae Woo, Rim, Woojin, Song, Taejoong, Kim, Gyuhong, Won, Hyo-Sig, Jung, Seong-Ook

“…A pMOS transistor with a switch is used for two purposes in a differential bitline: precharging and preamplifying during a read operation. These functions are…”
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A 14 nm FinFET 128 Mb SRAM With V Enhancement Techniques for Low-Power Applications by Song, Taejoong, Rim, Woojin, Jung, Jonghoon, Yang, Giyong, Park, Jaeho, Park, Sunghyun, Kim, Yongho, Baek, Kang-Hyun, Baek, Sanghoon, Oh, Sang-Kyu, Jung, Jinsuk, Kim, Sungbong, Kim, Gyuhong, Kim, Jintae, Lee, Youngkeun, Sim, Sang-Pil, Yoon, Jong Shik, Choi, Kyu-Myung, Won, Hyosig, Park, Jaehong

“…Two 128 Mb dual-power-supply SRAM chips are fabricated in a 14 nm FinFET technology. A 0.064 μm 2 and a 0.080 μm 2 6T SRAM bitcells are designed for…”
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A CMOS Integrated Analog Pulse Compressor for MIMO Radar Applications by Sang Min Lee, Taejoong Song, Jongmin Park, Changhyuk Cho, Sangjun An, Kyutae Lim, Laskar, Joy

“…Conventional radar pulse compressors use either surface acoustic wave devices or fast convolution processing, but both solutions have significant drawbacks. To…”
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A 122-mW Low-Power Multiresolution Spectrum-Sensing IC With Self-Deactivated Partial Swing Techniques by Taejoong Song, Jongmin Park, Sang Min Lee, Jaehyouk Choi, Kihong Kim, Chang-Ho Lee, Kyutae Lim, Laskar, J.

“…A low-power multiresolution spectrum-sensing (LP-MRSS) IC utilizing self-deactivated partial swing techniques is fabricated in 0.18-¿m complementary…”
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A Low-Power CMOS Antenna-Switch Driver Using Shared-Charge Recycling Charge Pump by Jeongwon Cha, Taejoong Song, Changhyuk Cho, Minsik Ahn, Chang-Ho Lee, Laskar, Joy

“…A technique to reduce power consumption of charge-pump-based antenna-switch drivers by recycling wasted charges in clock buffers of charge pumps is presented…”
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Low-Power Technique for SRAM-Based On-Chip Arbitrary-Waveform Generator by Taejoong Song, Sang Min Lee, Jongmin Park, Joonhoi Hur, Lee, M, Kihong Kim, Chang-Ho Lee, Bien, F, Kyutae Lim, Laskar, J

“…A low-power technique for a static random-access memory (SRAM)-based on-chip arbitrary-waveform generator (AWG) is proposed for two types of…”
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Power analysis of asynchronous design using charge recycling and push-pull level converter by Taejoong Song, Kim, S, Kyutae Lim, Laskar, J

“…An asynchronous charge-recycling (ACR) scheme with a push-pull level converter (PPLC) receiver is proposed. In ACR_PPLC, ACR reduces the dynamic power…”
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Half-and-Half Compare Content Addressable Memory with Charge-Sharing Based Selective Match-Line Precharge Scheme by Woong Choi, Jongsun Park, Hoonki Kim, Changnam Park, Taejoong Song

“…In this paper, we present a half-and-half compare contents addressable memory (HHC-CAM) to reduce the dynamic power consumption as well as white space between…”
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Semi-active high-efficient CMOS rectifier for wireless power transmission by Kim, Stephen T, Taejoong Song, Jaehyouk Choi, Bien, Franklin, Kyutae Lim, Laskar, Joy

“…A semi-active high-efficient (SA-HE) CMOS rectifier with reverse leakage control has been developed. It employs a cross-coupled NMOS pair and two leakage…”
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A 3-nm Gate-All-Around SRAM Featuring an Adaptive Dual-Bitline and an Adaptive Cell-Power Assist Circuit by Song, Taejoong, Kim, Hoonki, Rim, Woojin, Jung, Hakchul, Park, Changnam, Lee, Inhak, Baek, Sanghoon, Jung, Jonghoon

“…A 256-Mb gate-all-around (GAA) 6T SRAM is implemented in Samsung 3GAE EUV technology. Adaptive dual-bitline (ADBL) and adaptive cell-power (ACP) SRAM assist…”
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