Search Results - "Singh Raghav, Himadri"

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  1. 1

    A balanced power analysis attack resilient adiabatic logic using single charge sharing transistor by Raghav, Himadri Singh, Kale, Izzet

    Published in Integration (Amsterdam) (01-11-2019)
    “…The existing Power Analysis Attacks (PAA) resilient adiabatic logic designs exhibit variations in current peaks, have asymmetric structures and suffer from…”
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    Journal Article
  2. 2

    Fully-Digital Broadband Calibration-Less Impedance Monitor for Probe Insertion Detection against Power Analysis Attacks by Rajanna, Viveka Konandur, Singh Raghav, Himadri, Wang, Tianqi, Alioto, Massimo

    “…In this work, a broadband supply impedance monitor is proposed to detect insertion of probing devices or package/PCB modifications in secure systems. The…”
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    Conference Proceeding
  3. 3

    Investigating the influence of adiabatic load on the 4-phase adiabatic system design by Raghav, Himadri Singh, Bartlett, V.A.

    Published in Integration (Amsterdam) (01-11-2020)
    “…This paper investigates the power-clock generation using Step Charging Circuits (SCC). In particular, the impact of the adiabatic load on the energy…”
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    Journal Article
  4. 4

    Harmonic free Delay Locked Loop having low jitter with wide-range operations by Maheshwari, S., Srinivasarao, M., Singh Raghav, Himadri, Singh, B. P.

    “…A Delay Locked Loops (DLL) suffers from harmonic locking problem over wide-range frequency operation. Phase selection circuit plays an important in DLL. It is…”
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    Conference Proceeding
  5. 5

    Adiabatic circuits for power-constrained cryptographic computations by Raghav, Himadri Singh

    Published 01-01-2018
    “…This thesis tackles the need for ultra-low power operation in power-constrained cryptographic computations. An example of such an application could be…”
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    Dissertation
  6. 6

    Design of low power, low jitter DLL tested at all five corners to avoid false locking by Raghav, H. S., Maheshwari, S., Srinivasarao, M., Singh, B. P.

    “…A modified Phase Selection Circuit, a modified Phase Frequency Detector and a modified Voltage Controlled Delay Line is proposed to improve the Delay Locked…”
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    Conference Proceeding
  7. 7

    Investigating the effectiveness of Without Charge-Sharing Quasi-Adiabatic Logic for energy efficient and secure cryptographic implementations by Raghav, Himadri Singh, Bartlett, Viv A., Kale, Izzet

    Published in Microelectronics (01-06-2018)
    “…Existing secure adiabatic logic designs use charge sharing inputs to deliver input independent energy dissipation and suffer from non-adiabatic losses (NAL)…”
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    Journal Article
  8. 8

    Symmetric Power Analysis Attack Resilient Adiabatic Logic for Smartcard Applications by Raghav, Himadri Singh, Bartlett, Viv A., Kale, Izzet

    “…On the whole existing secure adiabatic logic designs exhibit variations in current peaks and have asymmetric structures. However, asymmetric structure and…”
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    Conference Proceeding
  9. 9

    Robustness of power analysis attack resilient adiabatic logic: WCS-QuAL under PVT variations by Raghav, Himadri Singh, Bartlett, Viv A., Kale, Izzet

    “…In this paper, we propose Without Charge Sharing Quasi Adiabatic Logic (WCS-QuAL) as a countermeasure against Power Analysis Attacks. We evaluate and compare…”
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    Conference Proceeding
  10. 10

    Energy efficiency of 2-step charging power-clock for adiabatic logic by Raghav, Himadri Singh, Bartlett, Vivian A., Kale, Izzet

    “…The generation of power-clocks in adiabatic integrated circuits is investigated. Specifically, we consider the energy efficiency of a 2-step charging strategy…”
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    Conference Proceeding
  11. 11

    A novel power analysis attack resilient adiabatic logic without charge sharing by Raghav, Himadri Singh, Bartlett, Viv A., Kale, Izzet

    “…In this paper, we propose a novel power analysis attack resilient adiabatic logic which, unlike existing secure adiabatic logic designs doesn't require any…”
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    Conference Proceeding
  12. 12

    Investigation of stepwise charging circuits for power-clock generation in Adiabatic Logic by Raghav, Himadri Singh, Bartlett, Vivian A., Kale, Izzet

    “…The generation of power-clocks in adiabatic integrated circuits is investigated. Specifically, we consider stepwise charging strategies (2, 3, 4, 5, 6, 7, and…”
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    Conference Proceeding
  13. 13

    Design of low voltage OTA for bio-medical application by Raghav, Himadri Singh, Singh, B. P., Maheshwari, Sachin

    “…This paper deals with the design of a low power signal conditioning circuit for use in biomedical applications. The signal conditioning circuit constitutes an…”
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    Conference Proceeding