Search Results - "Silveira, L. Miguel"
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Improved 7 Tesla resting-state fMRI connectivity measurements by cluster-based modeling of respiratory volume and heart rate effects
Published in NeuroImage (Orlando, Fla.) (01-06-2017)“…Several strategies have been proposed to model and remove physiological noise from resting-state fMRI (rs-fMRI) data, particularly at ultrahigh fields (7 T),…”
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Guaranteed passive balancing transformations for model order reduction
Published in Annual ACM IEEE Design Automation Conference: Proceedings of the 39th conference on Design automation : New Orleans, Louisiana, USA; 10-14 June 2002 (10-06-2002)“…The major concerns in state-of-the-art model reduction algorithms are: achieving accurate models of sufficiently small size, numerically stable and efficient…”
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Conference Proceeding -
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Speedpath analysis under parametric timing models
Published in Design Automation Conference (01-06-2010)“…The clock frequency of a digital IC is limited by its slowest paths, designated by speedpaths. Given the extreme complexity involved in modeling modern IC…”
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Conference Proceeding -
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Analysis of the conditions for the worst case switching activity in integrated circuits
Published in Analog integrated circuits and signal processing (01-02-2012)“…Relentless advances in IC technologies have fueled steady increases on fabricated component density and working frequencies. As feature sizes decrease to…”
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Variability and statistical analysis flow for dynamic linear systems with large number of inputs
Published in 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE) (01-03-2016)“…Fast analysis of the dynamics of large linear systems with large number of inputs, such as power grid (PG) nets, is a required component of system verification…”
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Conference Proceeding Journal Article -
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Guaranteed passive balancing transformations for model order reduction
Published in Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324) (2002)“…The major concerns in state-of-the-art model reduction algorithms are: achieving accurate models of sufficiently small size, numerically stable and efficient…”
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Conference Proceeding -
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Black-box model reduction of the C. Elegans nervous system
Published in 2021 43rd Annual International Conference of the IEEE Engineering in Medicine & Biology Society (EMBC) (01-11-2021)“…In recent years, modeling neurons and neuronal collections with high accuracy have become central issues of neuroscience. The development of efficient…”
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Conference Proceeding Journal Article -
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ARMS - automatic residue-minimization based sampling for multi-point modeling techniques
Published in 2009 46th ACM/IEEE Design Automation Conference (26-07-2009)“…This paper describes an automatic methodology for optimizing sample point selection for using in the framework of model order reduction (MOR). The procedure,…”
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Conference Proceeding -
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Micro-VMS: A VMS Mobile Unit for Artisanal Fishing Vessels
Published in 2018 16th International Conference on Intelligent Transportation Systems Telecommunications (ITST) (01-10-2018)“…It is widely accepted that Vessel Monitoring Systems (VMS) are currently a fundamental tool in the control of fishing activity. While larger vessels, because…”
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Conference Proceeding -
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A coordinate-transformed Arnoldi algorithm for generating guaranteed stable reduced-order models of RLC circuits
Published in Computer methods in applied mechanics and engineering (12-02-1999)“…Since the first papers on asymptotic waveform evaluation (AWE), Padé-based reduced order models have become standard for improving coupled circuit-interconnect…”
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Substrate model extraction using finite differences and parallel multigrid
Published in Integration (Amsterdam) (01-07-2007)“…Substrate noise in integrated circuits is one of the most important problems in high-frequency mixed-signal designs, such as communication, biomedical and…”
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Efficient Computation of the Worst-Delay Corner
Published in 2007 Design, Automation & Test in Europe Conference & Exhibition (01-04-2007)“…Timing analysis and verification is a critical stage in digital integrated circuit design. As feature sizes decrease to nanometer scale, the impact of process…”
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Conference Proceeding -
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Exploiting input information in a model reduction algorithm for massively coupled parasitic networks
Published in Annual ACM IEEE Design Automation Conference: Proceedings of the 41st annual conference on Design automation; 07-11 June 2004 (07-06-2004)“…In this paper we present a model reduction algorithm that circumvents some of the issues encountered for parasitic networks with large numbers of input/output…”
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Poor man's TBR: a simple model reduction scheme
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01-01-2005)“…This work presents a model reduction algorithm motivated by a connection between frequency-domain projection methods and approximation of truncated balanced…”
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Efficient Reduced-Order Modeling of Frequency-Dependent Coupling Inductances associated with 3-D Interconnect Structures
Published in 32nd Design Automation Conference (1995)“…Since the first papers on asymptotic waveform evaluation (AWE), reduced order models have become standard for improving interconnect simulation efficiency, and…”
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Conference Proceeding -
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Guaranteed passive balancing transformations for model order reduction
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01-08-2003)“…The major concerns in state-of-the-art model reduction algorithms are: achieving accurate models of sufficiently small size, numerically stable and efficient…”
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Journal Article -
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A convex programming approach for generating guaranteed passive approximations to tabulated frequency-data
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01-02-2004)“…In this paper, we present a methodology for generating guaranteed passive time-domain models of subsystems described by tabulated frequency-domain data…”
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Efficient analysis of variability impact on interconnect lines and resistor networks
Published in 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE) (01-03-2014)“…Continued technology scaling coupled with limited lithographic capabilities is a leading cause of increased design variability. In the nanometer regime…”
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Conference Proceeding -
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Effective Corner-Based Techniques for Variation-Aware IC Timing Verification
Published in IEEE transactions on computer-aided design of integrated circuits and systems (01-01-2010)“…Traditional integrated circuit timing sign-off consists of verifying a design for a set of carefully chosen combinations of process and operating parameter…”
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Journal Article