Search Results - "Siegwart, H"

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  1. 1

    Thermally stable, sub-nanometer equivalent oxide thickness gate stack for gate-first In0.53Ga0.47As metal-oxide-semiconductor field-effect-transistors by El Kazzi, M., Czornomaz, L., Rossel, C., Gerl, C., Caimi, D., Siegwart, H., Fompeyrine, J., Marchiori, C.

    Published in Applied physics letters (06-02-2012)
    “…Metal-oxide-semiconductor (MOS) capacitors were fabricated by depositing composite 2 nm HfO2/1 nm Al2O3/1 nm a-Si gate stacks on p-In0.53Ga0.47As/InP (001)…”
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    Journal Article
  2. 2

    Direct observation of the alignment of ferromagnetic spins by antiferromagnetic spins by Nolting, F, Scholl, A, Stöhr, J, Seo, J. W, Fompeyrine, J, Siegwart, H, Locquet, J.-P, Anders, S, Lüning, J, Fullerton, E. E, Toney, M. F, Scheinfein, M. R, Padmore, H. A

    Published in Nature (London) (15-06-2000)
    “…The arrangement of spins at interfaces in a layered magnetic material often has an important effect on the properties of the material. One example of this is…”
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    Journal Article
  3. 3

    Towards large size substrates for III-V co-integration made by direct wafer bonding on Si by Daix, N., Uccelli, E., Czornomaz, L., Caimi, D., Rossel, C., Sousa, M., Siegwart, H., Marchiori, C., Hartmann, J. M., Shiu, K.-T., Cheng, C.-W., Krishnan, M., Lofaro, M., Kobayashi, M., Sadana, D., Fompeyrine, J.

    Published in APL materials (01-08-2014)
    “…We report the first demonstration of 200 mm InGaAs-on-insulator (InGaAs-o-I) fabricated by the direct wafer bonding technique with a donor wafer made of III-V…”
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    Journal Article
  4. 4

    CMOS compatible self-aligned S/D regions for implant-free InGaAs MOSFETs by Czornomaz, L., El Kazzi, M., Hopstaken, M., Caimi, D., Mächler, P., Rossel, C., Bjoerk, M., Marchiori, C., Siegwart, H., Fompeyrine, J.

    Published in Solid-state electronics (01-08-2012)
    “…► S/D access regions for self-aligned implant-free InGaAs MOSFETs are investigated. ► A combination of in situ dopped raised InGaAs S/D with Nickel–InGaAs…”
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    Journal Article
  5. 5

    Observation of Antiferromagnetic Domains in Epitaxial Thin Films by Scholl, A., Stöhr, J., Lüning, J., Seo, J. W., Fompeyrine, J., Siegwart, H., J.-P. Locquet, Nolting, F., Anders, S., Fullerton, E. E., Scheinfein, M. R., Padmore, H. A.

    “…Antiferromagnetic domains in an epitaxial thin film, LaFeO3on SrTiO3(100), were observed using a high-spatial-resolution photoelectron emission microscope with…”
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    Journal Article
  6. 6

    SrHfO3 as gate dielectric for future CMOS technology by ROSSEL, C, SOUSA, M, GERMANN, R, TAPPONNIER, A, BABICH, K, MARCHIORI, C, FOMPEYRINE, J, WEBB, D, CAIMI, D, MEREU, B, ISPAS, A, LOCQUET, J. P, SIEGWART, H

    Published in Microelectronic engineering (01-09-2007)
    “…Thin epitaxial films of the high-kappa perovskite SrHfO3 were grown by molecular beam epitaxy on Si(100) and investigated by ellipsometry and X-ray…”
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    Conference Proceeding Journal Article
  7. 7
  8. 8

    Interface formation and defect structures in epitaxial La2Zr2O7 thin films on (111) Si by Seo, J. W., Fompeyrine, J., Guiller, A., Norga, G., Marchiori, C., Siegwart, H., Locquet, J.-P.

    Published in Applied physics letters (22-12-2003)
    “…We have studied the growth of epitaxial La2Zr2O7 thin films on (111) Si. Although the interface structure can be strongly affected by the Si oxidation during…”
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    Journal Article
  9. 9

    Heterointegration by molecular beam epitaxy: (In,Ga)As/GaAs quantum wells on GaAs, Ge, Ge/Si and Ge/Si pillars by Richter, M., Uccelli, E., Taboada, A.G., Caimi, D., Daix, N., Sousa, M., Marchiori, C., Siegwart, H., Falub, C.V., von Känel, H., Isa, F., Isella, G., Pezous, A., Dommann, A., Niedermann, P., Fompeyrine, J.

    Published in Journal of crystal growth (01-09-2013)
    “…(In,Ga)As/GaAs quantum wells were heterogeneously integrated on planar and patterned Ge/Si (001) substrates by molecular beam epitaxy. Both nominal and vicinal…”
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    Journal Article Conference Proceeding
  10. 10

    GaAs on 200 mm Si wafers via thin temperature graded Ge buffers by molecular beam epitaxy by RICHTER, M, ROSSEL, C, FOMPEYRINE, J, WEBB, D. J, TOPURIA, T, GERL, C, SOUSA, M, MARCHIORI, C, CAIMI, D, SIEGWART, H, RICE, P. M

    Published in Journal of crystal growth (15-05-2011)
    “…For heterogeneous integration of III-V compound materials on 200 mm Si wafers, we present a complete in-situ molecular beam epitaxy (MBE) process from a Ge…”
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    Conference Proceeding Journal Article
  11. 11

    1.2 nm capacitance equivalent thickness gate stacks on Si-passivated GaAs by El Kazzi, M., Webb, D.J., Czornomaz, L., Rossel, C., Gerl, C., Richter, M., Sousa, M., Caimi, D., Siegwart, H., Fompeyrine, J., Marchiori, C.

    Published in Microelectronic engineering (01-07-2011)
    “…The formation of low- k Hf silicate in a-Si passivated gate stacks on GaAs has been identified as the limiting factor in reaching the 1 nm CET as required for…”
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    Journal Article Conference Proceeding
  12. 12

    Phase of reflection high-energy electron diffraction oscillations during (Ba,Sr)O epitaxy on Si(100): A marker of Sr barrier integrity by Norga, G. J., Marchiori, C., Guiller, A., Locquet, J. P., Rossel, Ch, Siegwart, H., Caimi, D., Fompeyrine, J., Conard, T.

    Published in Applied physics letters (26-12-2005)
    “…We use the reflection high-energy electron diffraction oscillation phase shift to monitor the stability of the Sr barrier, prepared by exposure of Si(100) to…”
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    Journal Article
  13. 13

    Lanthanum germanate as dielectric for scaled Germanium metal–oxide–semiconductor devices by Andersson, C., Rossel, C., Sousa, M., Webb, D.J., Marchiori, C., Caimi, D., Siegwart, H., Panayiotatos, Y., Dimoulas, A., Fompeyrine, J.

    Published in Microelectronic engineering (01-07-2009)
    “…We report a study of La 2O 3 with lanthanum germanate (LGO) as interfacial layer, or LGO alone as a gate dielectric candidate for scaled germanium…”
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    Journal Article Conference Proceeding
  14. 14

    Co-integrating high mobility channels for future CMOS, from substrate to circuits by Czornomaz, L., Daix, N., Uccelli, E., Caimi, D., Sousa, M., Rossel, C., Siegwart, H., Marchiori, C., Fompeyrine, J.

    “…Direct wafer bonding can be a vehicle for the dense co-integration of co-planar nano-scaled SiGe p-FETs and InGaAs n-FETs. Like for SiGe, direct wafer bonding…”
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    Conference Proceeding
  15. 15

    In-situ MBE Si as passivating interlayer on GaAs for HfO2 MOSCAP’s: effect of GaAs surface reconstruction by Webb, D.J., Fompeyrine, J., Nakagawa, S., Dimoulas, A., Rossel, C., Sousa, M., Germann, R., Alvarado, S.F., Locquet, J.P., Marchiori, C., Siegwart, H., Callegari, A., Kiewra, E., Sun, Y., De Souza, J., Hoffmann, N.

    Published in Microelectronic engineering (01-09-2007)
    “…We report a study of MOS capacitors having a dielectric of HfO2 and an interlayer of Si deposited in-situ, by MBE on GaAs surfaces prepared with various…”
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    Journal Article
  16. 16

    III/V layer growth on Si and Ge surfaces for direct wafer bonding as a path for hybrid CMOS by Uccelli, E., Daix, N., Czornomaz, L., Caimi, D., Rossel, C., Sousa, M., Siegwart, H., Marchiori, C., Hartmann, J. M., Fompeyrine, J.

    “…As Si-CMOS scaling has become increasingly challenging, III-V compound semiconductors such as In x Ga 1-x As (x≥0.53) (InGaAs) are receiving much interest as…”
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    Conference Proceeding
  17. 17

    Field-effect transistors with SrHfO3 as gate oxide by Rossel, C., Mereu, B., Marchiori, C., Caimi, D., Sousa, M., Guiller, A., Siegwart, H., Germann, R., Locquet, J.-P., Fompeyrine, J., Webb, D. J., Dieker, Ch, Seo, Jin Won

    Published in Applied physics letters (31-07-2006)
    “…The authors demonstrate that the compound SrHfO3 grown epitaxially on Si(100) by molecular-beam epitaxy is a potential gate dielectric to fabricate n- and…”
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    Journal Article
  18. 18

    Sub-nm equivalent oxide thickness on Si-passivated GaAs capacitors with low Dit by El Kazzi, M., Czornomaz, L., Webb, D. J., Rossel, C., Caimi, D., Siegwart, H., Fompeyrine, J., Marchiori, C.

    Published in Applied physics letters (01-08-2011)
    “…A thin amorphous silicon interlayer, inserted between the III-V semiconductor and the gate dielectric is expected to prevent III-V oxidation, as required for…”
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    Journal Article
  19. 19

    Sub-nm equivalent oxide thickness on Si-passivated GaAs capacitors with low D it by El Kazzi, M., Czornomaz, L., Webb, D. J., Rossel, C., Caimi, D., Siegwart, H., Fompeyrine, J., Marchiori, C.

    Published in Applied physics letters (01-08-2011)
    “…A thin amorphous silicon interlayer, inserted between the III-V semiconductor and the gate dielectric is expected to prevent III-V oxidation, as required for…”
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    Journal Article
  20. 20

    Thermally stable, sub-nanometer equivalent oxide thickness gate stack for gate-first In 0.53 Ga 0.47 As metal-oxide-semiconductor field-effect-transistors by El Kazzi, M., Czornomaz, L., Rossel, C., Gerl, C., Caimi, D., Siegwart, H., Fompeyrine, J., Marchiori, C.

    Published in Applied physics letters (08-02-2012)
    “…Metal-oxide-semiconductor (MOS) capacitors were fabricated by depositing composite 2nm HfO 2 /1nm Al 2 O 3 /1nm a-Si gate stacks on p-In 0.53 Ga 0.47 As/InP…”
    Get full text
    Journal Article