Search Results - "Shashaani, M."
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1
Bridging the testing speed gap: design for delay testability
Published in Proceedings IEEE European Test Workshop (2000)“…The economic testing of high-speed digital ICs is becoming increasingly problematic. Even advanced, expensive testers are not always capable of testing these…”
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Conference Proceeding
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2
A DFT technique for high performance circuit testing
Published in International Test Conference 1999. Proceedings (IEEE Cat. No.99CH37034) (1999)“…Testing of high performance integrated circuits is becoming increasingly a challenging task owing to high clock frequencies. Often testers are not able to test…”
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Conference Proceeding -
3
A low-speed BIST framework for high-performance circuit testing
Published in Proceedings 18th IEEE VLSI Test Symposium (2000)“…Testing of high performance integrated circuits is becoming increasingly a challenging task owing to high clock frequencies. Often testers are not able to test…”
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Conference Proceeding -
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A comparative analysis of high-speed digital test techniques
Published in Engineering Solutions for the Next Millennium. 1999 IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.99TH8411) (1999)“…Testing of high performance integrated circuits is becoming increasingly a challenging task owing to higher clock frequencies and non availability/economical…”
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Conference Proceeding