Search Results - "Sharif, Uzair"

Towards Reliable and Secure Post-Quantum Co-Processors based on RISC-V by Fritzmann, Tim, Sharif, Uzair, Muller-Gritschneder, Daniel, Reinbrecht, Cezar, Schlichtmann, Ulf, Sepulveda, Johanna

“…Increasingly complex and powerful Systems-on-Chips (SoCs), connected through a 5G network, form the basis of the Internet-of-Things (IoT). These technologies…”
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Random Finite Set Based Bayesian Filtering with OpenCL in a Heterogeneous Platform by Hu, Biao, Sharif, Uzair, Koner, Rajat, Chen, Guang, Huang, Kai, Zhang, Feihu, Stechele, Walter, Knoll, Alois

“…While most filtering approaches based on random finite sets have focused on improving performance, in this paper, we argue that computation times are very…”
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Efficient Software-Implemented HW Fault Tolerance for TinyML Inference in Safety-critical Applications by Sharif, Uzair, Mueller-Gritschneder, Daniel, Stahl, Rafael, Schlichtmann, Ulf

“…TinyML research has mainly focused on optimizing neural network inference in terms of latency, code-size and energy-use for efficient execution on low-power…”
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Performance and Accuracy in Soft-Error Resilience Evaluation using the Multi-Level Processor Simulator ETISS-ML by Mueller-Gritschneder, Daniel, Sharif, Uzair, Schlichtmann, Ulf

“…Soft errors are a major safety concern in many devices, e.g., in automotive, industrial, control or medical applications. Ideally, safety-critical systems…”
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(Invited) Cross-Layer Resilience: Challenges, Insights, and the Road Ahead by Cheng, Eric, Mueller-Gritschneder, Daniel, Abraham, Jacob, Bose, Pradip, Buyuktosunoglu, Alper, Chen, Deming, Cho, Hyungmin, Li, Yanjing, Sharif, Uzair, Skadron, Kevin, Stan, Mircea, Schlichtmann, Ulf, Mitra, Subhasish

“…Resilience to errors in the underlying hardware is a key design objective for a large class of computing systems, from embedded systems all the way to the…”
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COMPAS: Compiler-assisted Software-implemented Hardware Fault Tolerance for RISC-V by Sharif, Uzair, Mueller-Gritschneder, Daniel, Schlichtmann, Ulf

“…Safety-critical systems have to ensure safe operation in the face of random hardware errors. To meet these re-silience requirements in embedded systems,…”
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CompaSeC: A Compiler-Assisted Security Countermeasure to Address Instruction Skip Fault Attacks on RISC-V by Geier, Johannes, Auer, Lukas, Mueller-Gritschneder, Daniel, Sharif, Uzair, Schlichtmann, Ulf

“…Fault-injection attacks are a risk for any computing system executing security-relevant tasks, such as a secure boot process. While hardware-based…”
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Investigating the Inherent Soft Error Resilience of Embedded Applications by Full-System Simulation by Sharif, Uzair, Mueller-Gritschneder, Daniel, Schlichtmann, Ulf

“…It has long been acknowledged that some applications feature inherent resilience against soft errors, e.g., the impact of soft errors on multimedia…”
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CompaSeC: A Compiler-assisted Security Countermeasure to Address Instruction Skip Fault Attacks on RISC-V by Geier, Johannes, Auer, Lukas, Mueller-Gritschneder, Daniel, Sharif, Uzair, Schlichtmann, Ulf

“…Fault-injection attacks are a risk for any computing system executing security-relevant tasks, such as a secure boot process. While hardware-based…”
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Efficient Fault Injection for Embedded Systems: As Fast as Possible but as Accurate as Necessary by Maier, Petra R., Sharif, Uzair, Mueller-Gritschneder, Daniel, Schlichtmann, Ulf

“…When used for safety-critical applications, embedded systems must behave safely at all times - even in the presence of random hardware faults. To ensure this,…”
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Data association - solution or avoidance: Evaluation of a filter based on RFS framework and factor graphs with SME by Gulati, Dhiraj, Sharif, Uzair, Feihu Zhang, Clarke, Daniel, Knoll, Alois

“…Data or measurement-to-track association is an integral and expensive part of any solution performing multi-target multi-sensor Cooperative Localization (CL)…”
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Hardware-accelerated software library drivers generation for IP-centric SoC designs by Jassi, Munish, Sharif, Uzair, Muller-Gritschneder, Daniel, Schlichtmann, Ulf

“…In recent years, the semiconductor industry has been witnessing an increasing reuse of hardware IPs for System-on-Chip (SoC) designs and embedded computing…”
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