Search Results - "Seongil O"

Hardware Architecture and Software Stack for PIM Based on Commercial DRAM Technology : Industrial Product by Lee, Sukhan, Kang, Shin-haeng, Lee, Jaehoon, Kim, Hyeonsu, Lee, Eojin, Seo, Seungwoo, Yoon, Hosang, Lee, Seungwon, Lim, Kyounghwan, Shin, Hyunsung, Kim, Jinhyun, Seongil, O, Iyer, Anand, Wang, David, Sohn, Kyomin, Kim, Nam Sung

“…Emerging applications such as deep neural network demand high off-chip memory bandwidth. However, under stringent physical constraints of chip packages and…”
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25.4 A 20nm 6GB Function-In-Memory DRAM, Based on HBM2 with a 1.2TFLOPS Programmable Computing Unit Using Bank-Level Parallelism, for Machine Learning Applications by Kwon, Young-Cheon, Lee, Suk Han, Lee, Jaehoon, Kwon, Sang-Hyuk, Ryu, Je Min, Son, Jong-Pil, Seongil, O, Yu, Hak-Soo, Lee, Haesuk, Kim, Soo Young, Cho, Youngmin, Kim, Jin Guk, Choi, Jongyoon, Shin, Hyun-Sung, Kim, Jin, Phuah, BengSeng, Kim, HyoungMin, Song, Myeong Jun, Choi, Ahn, Kim, Daeho, Kim, SooYoung, Kim, Eun-Bong, Wang, David, Kang, Shinhaeng, Ro, Yuhwan, Seo, Seungwoo, Song, JoonHo, Youn, Jaeyoun, Sohn, Kyomin, Kim, Nam Sung

“…In recent years, artificial intelligence (AI) technology has proliferated rapidly and widely into application areas such as speech recognition, health care,…”
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Achieving One Billion Key-Value Requests per Second on a Single Server by Sheng Li, Hyeontaek Lim, Lee, Victor W., Jung Ho Ahn, Kalia, Anuj, Kaminsky, Michael, Andersen, David G., Seongil O, Sukhan Lee, Dubey, Pradeep

“…Distributed in-memory key-value stores (KVSs) have become a critical data-serving layer in cloud computing and big data infrastructure. Unfortunately, KVSs…”
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Architecting to achieve a billion requests per second throughput on a single key-value store server platform by Sheng Li, Hyeontaek Lim, Lee, Victor W., Jung Ho Ahn, Kalia, Anuj, Kaminsky, Michael, Andersen, David G., Seongil, O., Sukhan Lee, Dubey, Pradeep

“…Distributed in-memory key-value stores (KVSs), such as memcached, have become a critical data serving layer in modern Internet-oriented datacenter…”
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CiDRA: A cache-inspired DRAM resilience architecture by Young Hoon Son, Sukhan Lee, Seongil O, Sanghyuk Kwon, Nam Sung Kim, Jung Ho Ahn

“…Although aggressive technology scaling has allowed manufacturers to integrate Giga bits of cells into a cost-sensitive main memory DRAM device, these cells…”
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A 16Gb 9.5Gb/S/pin LPDDR5X SDRAM With Low-Power Schemes Exploiting Dynamic Voltage-Frequency Scaling and Offset-Calibrated Readout Sense Amplifiers in a Fourth Generation 10nm DRAM Process by Kim, Dae-Hyun, Song, Byungkyu, Ahn, Hyun-a, Ko, Woongjoon, Do, Sunggeun, Cho, Seokjin, Kim, Kihan, Oh, Seung-Hoon, Joo, Hye-Yoon, Park, Geuntae, Jang, Jin-Hun, Kim, Yong-Hun, Lee, Donghun, Jung, Jaehoon, Kwon, Yongmin, Kim, Youngjae, Jung, Jaewoo, O, Seongil, Lee, Seoulmin, Lim, Jaeseong, Son, Junho, Min, Jisu, Do, Haebin, Yoon, Jaejun, Hwang, Isak, Park, Jinsol, Shim, Hong, Yoon, Seryeong, Choi, Dongyeong, Lee, Jihoon, Woo, Soohan, Hong, Eunki, Choi, Junha, Kim, Jae-Sung, Han, Sangkeun, Bang, Jongmin, Park, Bokgue, Kim, Janghoo, Choi, Seouk-Kyu, Han, Gong-Heum, Sung, Yoo-Chang, Bae, Won-Il, Lim, Jeong-Don, Lee, Seungjae, Yoo, Changsik, Hwang, Sang Joon, Lee, Jooyoung

“…Mobile systems for 5G communications and emerging technologies, such as advanced driver assistance system (ADAS), augmented reality (AR), and artificial…”
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CIDR: A Cache Inspired Area-Efficient DRAM Resilience Architecture against Permanent Faults by Seongil, O., Sanghyuk Kwon, Young Hoon Son, Yujin Park, Jung Ho Ahn

“…Faulty cells have become major problems in cost-sensitive main-memory DRAM devices. Conventional solutions to reduce device failure rates due to cells with…”
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Exploring energy-efficient DRAM array organizations by Seongil, O., Sungwoo Choo, Jung Ho Ahn

“…DRAM is widely used as main-memory storage in contemporary computer systems. As VLSI process technology advances, more transistors can be integrated in a…”
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Defect Analysis and Cost-Effective Resilience Architecture for Future DRAM Devices by Cha, Sanguhn, Seongil, O., Shin, Hyunsung, Hwang, Sangjoon, Park, Kwangil, Jang, Seong Jin, Choi, Joo Sun, Jin, Gyo Young, Son, Young Hoon, Cho, Hyunyoon, Ahn, Jung Ho, Kim, Nam Sung

“…Technology scaling has continuously improved the density, performance, energy efficiency, and cost of DRAM-based main memory systems. Starting from sub-20nm…”
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Row-buffer decoupling: A case for low-latency DRAM microarchitecture by Seongil, O., Son, Young Hoon, Kim, Nam Sung, Ahn, Jung Ho

“…Modern DRAM devices for the main memory are structured to have multiple banks to satisfy ever-increasing throughput, energy-efficiency, and capacity demands…”
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McSimA+: A manycore simulator with application-level+ simulation and detailed microarchitecture modeling by Jung Ho Ahn, Sheng Li, Seongil, O., Jouppi, Norman P.

“…With their significant performance and energy advantages, emerging manycore processors have also brought new challenges to the architecture research community…”
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Microbank: architecting through-silicon interposer-based main memory systems by Son, Young Hoon, Seongil, O., Yang, Hyunggyun, Jung, Daejin, Ahn, Jung Ho, Kim, John, Kim, Jangwoo, Lee, Jae W.

“…Through-Silicon Interposer (TSI) has recently been proposed to provide high memory bandwidth and improve energy efficiency of the main memory system. However,…”
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Multimodel ensemble forecasting of rainfall over East Asia: regularized regression approach by Lim, Yaeji, Jo, Seongil, Lee, Jaeyong, Oh, Hee‐Seok, Lee, Sang‐Goo, Park, Yongtae, Kang, Hyun‐Suk

“…ABSTRACT This paper considers the problem of predicting the rainfall over East Asia from multimode outputs. For this purpose, we propose a new multimode…”
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