Search Results - "See, G. H."

Surface-Potential Solution for Generic Undoped MOSFETs With Two Gates by Shangguan, W.Z., Xing Zhou, Chandrasekaran, K., Zhaomin Zhu, Rustagi, S.C., Chiah, S.B., Guan Huei See

“…We present a rigorously derived analytical Poisson solution for undoped semiconductors and apply the general solution to generic MOSFETs with two gates,…”
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Single-piece polycrystalline silicon accumulation/depletion/inversion model with implicit/explicit surface-potential solutions by Chiah, S. B., Zhou, X., Chandrasekaran, K., Shangguan, W. Z., See, G. H., Pandey, S. M.

“…A single-piece analytical equation for the surface potential at the polycrystalline-silicon (poly-Si) gate of a metal-oxide-semiconductor field-effect…”
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A CMP Process for Hybrid Bonding Application with Conventional / nt-Cu and SixNy / SixOy Dielectrics by Widodo, T. S., Brun, X. F., Lianto, P., Tan, A., Lie, J., Lim, P., See, G. H.

“…Advanced packaging has become an important part of the semiconductor technology to realize More-than-Moore paradigm, through its various building blocks for…”
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A compact model for undoped symmetric double-gate MOSFETs with Schottky-barrier source/drain by Zhu, G.J., Zhou, X., Lee, T.S., Ang, L.K., See, G.H., Lin, S.H.

“…A physics-based compact model for undoped symmetric double-gate MOSFETs with Schottky-barrier source and drain is formulated based on the quasi-2D…”
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Effect of substrate doping on the capacitance-Voltage characteristics of strained-silicon pMOSFETs by Chandrasekaran, K., Xing Zhou, Chiah, S.B., Shangguan, W., Guan Huei See, Bera, L.K., Balasubramanian, N., Rustagi, S.C.

“…The effect of substrate doping on the capacitance-voltage characteristics of a surface-channel strained-silicon p-channel MOSFET has been studied to explain a…”
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Physics-based single-piece charge model for strained-Si MOSFETs by Chandrasekaran, K., Xing Zhou, Chiah, S.B., Shangguan, W., Guan Huei See

“…A physics-based single-piece charge model for strained-silicon (s-Si) MOSFETs from accumulation to strong-inversion regions is presented. The model is…”
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Physics based scalable MOSFET mismatch model for statistical circuit simulation by Lim, G.H., Zhou, X., Khu, K., Yoo, Y.K., Poh, F., See, G.H., Zhu, Z.M., Wei, C.Q., Lin, S.H., Zhu, G.J.

“…MOSFET mismatch model based on BSIM3v3 for a CMOS 0.13 μm technology using backward propagation of variance (BPV) methodology coupled with Pelgrom model basis…”
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A rigorous surface-potential-based I-V model for undoped cylindrical nanowire MOSFETs by Lin, S.H., Zhou, X., See, G.H., Zhu, Z.M., Lim, G.H., Wei, C.Q., Zhu, G.J., Yao, Z.H., Wang, X.F., Yee, M., Zhao, L.N., Hou, Z.F., Ang, L.K., Lee, T.S., Chandra, W.

“…A non-charge-sheet surface-potential-based compact drain-current model for long-channel undoped gate-all-around (GAA) silicon-nanowire (SiNW) MOSFETs is…”
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New challenges in MOS compact modeling for future generation CMOS by Zhou, X., See, G.H., Zhu, G.J., Zhu, Z.M., Lin, S.H., Wei, C.Q., Srinivas, A., Zhang, J.B.

“…As bulk-MOS technology is approaching its fundamental limit, non-classical devices such as multiple-gate (MG) and silicon-nanowire (SiNW) transistors emerge as…”
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Impact of BEOL, multi-fingered layout design, and gate protection diode on intrinsic MOSFET threshold voltage mismatch by Lim, G.H., Zhou, X., Khu, K., Yoo, Y.K., Poh, F., See, G.H., Zhu, Z.M., Wei, C.Q., Lin, S.H., Zhu, G.J.

“…Continued scaling down of MOSFETs, compounded with limitation in process variation control capabilities, has made MOSFET mismatch more significant for advanced…”
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Effects of pulling rate fluctuation on the interstitial-vacancy boundary formation in CZ-Si single crystal by Park, Bong Mo, Ho Seo, Gyeong, Kim, Gun

“…In CZ-Si crystal, the position of interstitial-vacancy (i-v) boundary is mainly controlled by the factors of crystal pulling rate and temperature gradient…”
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Extraction of physical parameters of strained silicon MOSFETs from C-V measurement by Chandrasekaran, K., Xing Zhou, Siau Ben Chiah, Wangzuo Shangguan, Guan Huei See, Bera, L.K., Balasubramanian, N., Rustagi, S.C.

“…This paper presents a methodology for extraction of the physical parameters of strained-silicon MOSFET from one capacitance-voltage (C-V) measurement based on…”
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Xsim: unified regional approach to compact modeling for next generation CMOS by Xing Zhou, Siau Ben Chiah, Karthik Chandrasekaran, Wangzuo Shangguan, Guan Huei See

“…This paper describes the approaches in the development of Xsim, a unified regional threshold-voltage-based model for deep-submicron MOSFETs. In comparison to…”
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