Search Results - "Schram, Tom"

Two-Dimensional Crystal Grain Size Tuning in WS2 Atomic Layer Deposition: An Insight in the Nucleation Mechanism by Groven, Benjamin, Nalin Mehta, Ankit, Bender, Hugo, Meersschaut, Johan, Nuytten, Thomas, Verdonck, Patrick, Conard, Thierry, Smets, Quentin, Schram, Tom, Schoenaers, Ben, Stesmans, Andre, Afanasʼev, Valeri, Vandervorst, Wilfried, Heyns, Marc, Caymax, Matty, Radu, Iuliana, Delabie, Annelies

“…When two-dimensional (2D) group-VI transition metal dichalcogenides such as tungsten disulfide (WS2) are grown by atomic layer deposition (ALD) for atomic…”
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Multiring Circular Transmission Line Model for Ultralow Contact Resistivity Extraction by Hao Yu, Schaekers, Marc, Schram, Tom, Rosseel, Erik, Martens, Koen, Demuynck, Steven, Horiguchi, Naoto, Barla, Kathy, Collaert, Nadine, De Meyer, Kristin, Thean, Aaron

“…Accurate determination of contact resistivities (P c ) below 1 × 10 -8 Ω · cm 2 is challenging. Among the frequently applied transmission line models (TLMs),…”
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A Simplified Method for (Circular) Transmission Line Model Simulation and Ultralow Contact Resistivity Extraction by Hao Yu, Schaekers, Marc, Schram, Tom, Collaert, Nadine, De Meyer, Kristin, Horiguchi, Naoto, Thean, Aaron, Barla, Kathy

“…The metal resistance in the transmission line model (TLM) structures creates a serious obstacle to determine precisely the intrinsic contact resistivity. To…”
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Thermal Stability Concern of Metal-Insulator-Semiconductor Contact: A Case Study of Ti/TiO2/n-Si Contact by Hao Yu, Schaekers, Marc, Schram, Tom, Demuynck, Steven, Horiguchi, Naoto, Barla, Kathy, Collaert, Nadine, Thean, Aaron Voon-Yew, De Meyer, Kristin

“…This work discusses the thermal stability of metal-insulator-semiconductor (MIS) contacts. A case study is performed on a typical low-Schottky barrier height…”
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Optimized material solutions for advanced DRAM peripheral transistors by Spessot, Alessio, Ritzenthaler, Romain, Schram, Tom, Horiguchi, Naoto, Fazan, Pierre

“…The fabrication of peripheral CMOS devices for DRAM memories requires specific optimization with respect to a standard logic flow, imposed by the additional…”
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Low-Resistance Titanium Contacts and Thermally Unstable Nickel Germanide Contacts on p-Type Germanium by Hao Yu, Schaekers, Marc, Schram, Tom, Aderhold, Wolfgang, Mayur, Abhilash J., Mitard, Jerome, Witters, Liesbeth, Barla, Kathy, Collaert, Nadine, Horiguchi, Naoto, Voon-Yew Thean, Aaron, De Meyer, Kristin

“…Ti/p-Ge and NiGe/p-Ge contacts are compared on both planar and fin-based devices. Ti/p-Ge contacts show low contact resistance, while NiGe/p-Ge devices show…”
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Development of a Technique for Characterizing Bias Temperature Instability-Induced Device-to-Device Variation at SRAM-Relevant Conditions by Meng Duan, Jian Fu Zhang, Zhigang Ji, Wei Dong Zhang, Kaczer, Ben, Schram, Tom, Ritzenthaler, Romain, Groeseneken, Guido, Asenov, Asen

“…SRAM is vulnerable to device-to-device variation (DDV), since it uses minimum-sized devices and requires device matching. In addition to the as-fabricated DDV…”
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Evidence of contact-induced variability in industrially-fabricated highly-scaled MoS2 FETs by Panarella, Luca, Kaczer, Ben, Smets, Quentin, Tyaginov, Stanislav, Saraza Canflanca, Pablo, Vici, Andrea, Verreck, Devin, Schram, Tom, Lin, Dennis, Knobloch, Theresia, Grasser, Tibor, Lockhart de la Rosa, César, Kar, Gouri S., Afanas’ev, Valeri

“…Evidence of microscopic inhomogeneities of the side source/drain contacts in 300 mm wafer integrated MoS 2 field-effect transistors is presented. In…”
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CMOS integration of high-k/metal gate transistors in diffusion and gate replacement (D&GR) scheme for dynamic random access memory peripheral circuits by Litta, Eugenio Dentoni, Ritzenthaler, Romain, Schram, Tom, Spessot, Alessio, O Sullivan, Barry, Machkaoutsan, Vladimir, Fazan, Pierre, Ji, Yunhyuck, Mannaert, Geert, Lorant, Christophe, Sebaai, Farid, Thiam, Arame, Ercken, Monique, Demuynck, Steven, Horiguchi, Naoto

“…Integration of high-k/metal gate stacks in peripheral transistors is a major candidate to ensure continued scaling of dynamic random access memory (DRAM)…”
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Impact of Hot Carrier Aging on Random Telegraph Noise and Within a Device Fluctuation by Manut, Azrif B., Zhang, Jian Fu, Duan, Meng, Ji, Zhigang, Zhang, Wei Dong, Kaczer, Ben, Schram, Tom, Horiguchi, Naoto, Groeseneken, Guido

“…For nanometer MOSFETs, charging and discharging a single trap induces random telegraph noise (RTN). When there are more than a few traps, RTN signal becomes…”
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Challenges of Wafer‐Scale Integration of 2D Semiconductors for High‐Performance Transistor Circuits by Schram, Tom, Sutar, Surajit, Radu, Iuliana, Asselberghs, Inge

“…Large‐area 2D‐material‐based devices may find applications as sensor or photonics devices or can be incorporated in the back end of line (BEOL) to provide…”
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Reliability impact of advanced doping techniques for DRAM peripheral MOSFETs by Spessot, Alessio, Ritzenthaler, Romain, Schram, Tom, Aoulaiche, Marc, Cho, Moonju, Luque, Maria Toledano, Horiguchi, Naoto, Fazan, Pierre

“…We have evaluated the impact on the reliability of an innovative process flow, specifically designed for peripheral MOSFETs of DRAM memories. Al and MgO layers…”
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W versus Co--Al as Gate Fill-Metal for Aggressively Scaled Replacement High-$k$/Metal Gate Devices for (Sub-)22 nm Technology Nodes by Veloso, Anabela, Chew, Soon Aik, Schram, Tom, Dekkers, Harold, Ammel, Annemie Van, Witters, Thomas, Tielens, Hilde, Heylen, Nancy, Devriendt, Katia, Sebaai, Farid, Brus, Stephan, Ragnarsson, Lars-$Å$ke, Pantisano, Luigi, Eneman, Geert, Carbonell, Laure, Richard, Olivier, Favia, Paola, Geypen, Jef, Bender, Hugo, Higuchi, Yuichi, Phatak, Anup, Thean, Aaron, Horiguchi, Naoto

“…In this work we provide a comprehensive evaluation of a novel, low-resistance Co--Al alloy vs W to fill aggressively scaled gates with high aspect-ratios [gate…”
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Thermal and plasma treatments for improved (sub-)1 nm equivalent oxide thickness planar and FinFET-based replacement metal gate high-k last devices and enabling a simplified scalable CMOS integration scheme by Veloso, Anabela, Boccardi, Guillaume, Ragnarsson, Lars-Åke, Higuchi, Yuichi, Arimura, Hiroaki, Lee, Jae Woo, Simoen, Eddy, Cho, Moon Ju, Roussel, Philippe J., Paraschiv, Vasile, Shi, Xiaoping, Schram, Tom, Chew, Soon Aik, Brus, Stephan, Dangol, Anish, Vecchio, Emma, Sebaai, Farid, Kellens, Kristof, Heylen, Nancy, Devriendt, Katia, Dekkers, Harold, Van Ammel, Annemie, Witters, Thomas, Conard, Thierry, Vaesen, Inge, Richard, Olivier, Bender, Hugo, Athimulam, Raja, Chiarella, Thomas, Thean, Aaron, Horiguchi, Naoto

“…We report on aggressively scaled replacement metal gate, high-k last (RMG-HKL) planar and multi-gate fin field-effect transistor (FinFET) devices,…”
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Novel dual layer floating gate structure as enabler of fully planar flash memory by Blomme, P, Rosmeulen, M, Cacciato, A, Kostermans, M, Vrancken, C, Van Aerde, S, Schram, T, Debusschere, I, Jurczak, M, Van Houdt, J

“…Flash pitch scaling will lead to cells for which the wordline no longer fits between the floating gates, which results in loss of sidewall coupling, causing…”
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Place matters: Review of the literature on rural teacher education by Reagan, Emilie Mitescu, Hambacher, Elyse, Schram, Tom, McCurdy, Kathryn, Lord, Dan, Higginbotham, Thomas, Fornauf, Beth

“…•This article synthesizes 59 articles on rural teacher education between 2007 and 2017.•This review includes analysis of how rural teacher education is…”
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Achieving Conduction Band-Edge Effective Work Functions by \hbox\hbox Capping of Hafnium Silicates by Ragnarsson, Lars-Ake, Chang, Vincent S., Yu, Hong Yu, Cho, Hag-Ju, Conard, Thierry, Yin, Kai Min, Delabie, Annelies, Swerts, Johan, Schram, Tom, De Gendt, Stefan, Biesemans, Serge

“…Conduction band-edge effective work functions ( \phi_{m, {\rm eff}} ) are demonstrated with \hbox{TaC}_{x} and TiN by means of \hbox{La}_{2}\hbox{O}_{3}…”
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Experimental-Modeling Framework for Identifying Defects Responsible for Reliability Issues in 2D FETs by Panarella, Luca, Tyaginov, Stanislav, Kaczer, Ben, Smets, Quentin, Verreck, Devin, Makarov, Alexander, Schram, Tom, Lin, Dennis, Lockhart de la Rosa, César Javier, Kar, Gouri S., Afanas’ev, Valeri

“…In this work, a self-consistent method is used to identify and describe defects plaguing 300 mm integrated 2D field-effect transistors. This method requires…”
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Process Variation Analysis of Device Performance Using Virtual Fabrication: Methodology Demonstrated on a CMOS 14-nm FinFET Vehicle by Vincent, Benjamin, Hathwar, Raghu, Kamon, Mattan, Ervin, Joseph, Schram, Tom, Chiarella, Thomas, Demuynck, Steven, Baudot, Sylvain, Siew, Yong Kong, Kubicek, Stenfan, Litta, Eugenio Dentoni, Chew, SoonAik, Mitard, Jerome

“…A new methodology is demonstrated to assess the impact of fabrication inherent process variability on 14-nm fin field effect transistor (FinFET) device…”
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TaN Versus TiN Metal Gate Input/Output pMOSFETs: A Low-Frequency Noise Perspective by Simoen, Eddy, O'sullivan, Barry, Ritzenthaler, Romain, Dentoni Litta, Eugenio, Schram, Tom, Horiguchi, Naoto, Claeys, Cor

“…It is shown that replacing a TiN effective work function metal by TaN results in a pronounced reduction of the low-frequency noise power spectral density (PSD)…”
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