Power Delivery Network Design for 3D SIP Integrated over Silicon Interposer Platform

As mobile hand-held devices including mobile phone are required to provide multi-media services more and more, it is necessary that the various hardware including high speed memory, high capacity data storage device, and high performance logic processor are integrated into the limited volume, which...

Full description

Saved in:

Bibliographic Details
Published in:	2007 Proceedings 57th Electronic Components and Technology Conference pp. 1193 - 1198
Main Authors:	Heeseok Lee, Yun-Seok Choi, Eunseok Song, Kiwon Choi, Taeje Cho, Sayoun Kang
Format:	Conference Proceeding
Language:	English
Published:	IEEE 01-05-2007
Subjects:	Capacitance Capacitors Electromagnetic interference Frequency Hardware Impedance Integrated circuit interconnections Packaging Semiconductor device noise Silicon
Online Access:	Get full text
Tags:	Add Tag No Tags, Be the first to tag this record!

Description
Summary:	As mobile hand-held devices including mobile phone are required to provide multi-media services more and more, it is necessary that the various hardware including high speed memory, high capacity data storage device, and high performance logic processor are integrated into the limited volume, which results in high density 3D SIP. In this work, power delivery network for 3D SIP integrated on silicon interposer will be discussed. The silicon interposer used in 3D SIP includes integrated decoupling capacitor, which gives good power delivery performance.
ISBN:	9781424409846 1424409845
ISSN:	0569-5503 2377-5726
DOI:	10.1109/ECTC.2007.373945