Wafer Level Variability Improvement by Spatial Source/Drain Activation and Ion Implantation Super Scan for FinFET Technology

In this paper, CMOS wafer level ring oscillator frequency variability improvement >40% is demonstrated by either spatial source/drain activation or ion implantation super scan in FinFET technology. Yield improvement (up to 17%) is verified with better within wafer uniformity and with no intrinsic...

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Bibliographic Details

Published in:	IEEE transactions on semiconductor manufacturing Vol. 31; no. 3; pp. 371 - 375
Main Authors:	Wang, Yanzhen, Yong, Yoong Hooi, Liu, Bingwu, Zhou, Dibao, Togo, Mitsuhiro, Choi, Dongil, Lee, Jae Gon, Lo, Hsien-Ching, Dou, Xinyuan, Gu, Sipeng, Shintri, Shashidhar, Tong, Weihua, Sargunas, Vidmantas, Argandona, Jorge
Format:	Journal Article
Language:	English
Published:	New York IEEE 01-08-2018 The Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subjects:	Activation CMOS CMOS integrated circuits electric variables control FinFET FinFETs Ion implantation Junctions Logic gates Performance degradation Performance evaluation rapid thermal annealing semiconductor device ion implantation Systematics Tuning
Online Access:	Get full text
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