Search Results - "Saraswat, K C"

High performance, uniaxially-strained, silicon and germanium, double-gate p-MOSFETs by Krishnamohan, T., Jungemann, C., Kim, D., Ungersboeck, E., Selberherr, S., Pham, A.-T., Meinerzhagen, B., Wong, P., Nishi, Y., Saraswat, K.C.

“…The effect of uniaxial-strain, band-structure, mobility, effective masses, density of states, channel orientation and high-field transport on the drive…”
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Improved gradual resistive switching range and 1000× on/off ratio in HfOx RRAM achieved with a Ge2Sb2Te5 thermal barrier by Islam, R., Qin, S., Deshmukh, S., Yu, Z., Köroğlu, C., Khan, A. I., Schauble, K., Saraswat, K. C., Pop, E., Wong, H.-S. P.

“…Gradual switching between multiple resistance levels is desirable for analog in-memory computing using resistive random-access memory (RRAM). However, the…”
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Effect of isochronal hydrogen annealing on surface roughness and threading dislocation density of epitaxial Ge films grown on Si by Kobayashi, S., Nishi, Y., Saraswat, K.C.

“…We report the effect of hydrogen annealing on the surface roughness and threading dislocation density (TDD) of germanium (Ge) films grown on silicon (Si)…”
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3-D ICs: a novel chip design for improving deep-submicrometer interconnect performance and systems-on-chip integration by Banerjee, K., Souri, S.J., Kapur, P., Saraswat, K.C.

“…Performance of deep-submicrometer very large scale integrated (VLSI) circuits is being increasingly dominated by the interconnects due to decreasing wire pitch…”
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High-mobility ultrathin strained Ge MOSFETs on bulk and SOI with low band-to-band tunneling leakage: experiments by Krishnamohan, T., Krivokapic, Z., Uchida, K., Nishi, Y., Saraswat, K.C.

“…For the first time, the tradeoffs between higher mobility (smaller bandgap) channel and lower band-to-band tunneling (BTBT) leakage have been investigated. In…”
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Power comparison between high-speed electrical and optical interconnects for interchip communication by Hoyeol Cho, Kapur, P., Saraswat, K.C.

“…An I/O bandwidth commensurate with a dramatically increasing on-chip computational capability is highly desirable. Achieving this goal using board-level copper…”
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Electrical properties of heavily doped polycrystalline silicon-germanium films by King, T.-J., McVittie, J.P., Saraswat, K.C., Pfiester, J.R.

“…The electrical properties of polycrystalline silicon-germanium (poly-Si/sub 1/spl minus/x/Ge/sub x/) films with germanium mole fractions up to 0.56 doped by…”
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Air-gap formation during IMD deposition to lower interconnect capacitance by Shieh, B., Saraswat, K.C., McVittie, J.P., List, S., Nag, S., Islamraja, M., Havemann, R.H.

“…The use of air-gaps between interconnect metal lines to reduce interconnect capacitance has been explored. Simulations were performed to determine the…”
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The effect of fluorine in silicon dioxide gate dielectrics by Wright, P.J., Saraswat, K.C.

“…The effect of post-oxide-growth fluorine incorporation in gate dielectrics is reported. Fluorine was introduced through ion implantation into polysilicon and…”
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Interconnect limits on gigascale integration (GSI) in the 21st century by Davis, J.A., Meindl, J.D., Venkatesan, R., Kaloyeros, A., Beylansky, M., Souri, S.J., Banerjee, K., Saraswat, K.C., Rahman, A., Reif, R.

“…Twenty-first century opportunities for GSI will be governed in part by a hierarchy of physical limits on interconnects whose levels are codified as…”
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Effective dark current suppression with asymmetric MSM photodetectors in Group IV semiconductors by Chi On Chui, Okyay, A.K., Saraswat, K.C.

“…We have demonstrated for the first time, with both simulations and experiments, the application of an asymmetric metal electrode scheme in Group IV…”
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Effects of Thermal Annealing on In Situ Phosphorus-Doped Germanium \hbox^/\hbox Junction by Jaewoo Shim, Song, I., Jung, W.-S, Nam, J., Leem, J. W., Yu, J. S., Kim, D. E., Cho, W. J., Kim, Y. S., Jun, D.-H, Heo, J., Park, W., Jin-Hong Park, Saraswat, K. C.

“…In this letter, we investigate the electrical behavior of vacancy V Ge defects in Ge at various thermal annealing conditions through electrochemical…”
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High-mobility low band-to-band-tunneling strained-Germanium double-gate heterostructure FETs: Simulations by Krishnamohan, T., Donghyun Kim, Chi Dong Nguyen, Jungemann, C., Nishi, Y., Saraswat, K.C.

“…Large band-to-band tunneling (BTBT) leakage currents can ultimately limit the scalability of high-mobility (small-bandgap) materials. This paper presents a…”
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Fabrication of high-quality p-MOSFET in Ge grown heteroepitaxially on Si by Nayfeh, A., Chi On Chui, Yonehara, T., Saraswat, K.C.

“…We have successfully demonstrated high-performance p-MOSFETs in germanium grown directly on Si using a novel heteroepitaxial growth technique, which uses…”
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Scalability and electrical properties of germanium oxynitride MOS dielectrics by Chi On Chui, Ito, F., Saraswat, K.C.

“…In this letter, we present a fundamental study on the scalability and electrical properties of germanium oxynitride dielectrics for metal-oxide-semiconductor…”
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Reliability Studies on Multilevel Interconnection with Intermetal Dielectric Air Gaps by Sukharev, V., Shieh, B.P., Choudhury, R., Park, C., Saraswat, K.C.

“…We present simulation results for the mean time to failure (MTTF) in structures consisting of aluminum interconnect lines with air gaps deliberately introduced…”
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Germanium on insulator (GOI) structure locally grown on silicon using hetero epitaxial lateral overgrowth by Nam, J. H., Jung, W. S., Shim, J., Ito, T., Nishi, Y., Park, J.-H, Saraswat, K. C.

“…A CMOS compatible technique for fabricating germanium (Ge) on insulator (GOI) structure that is locally implemented on silicon (Si) substrate is demonstrated…”
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Thermal nitridation of Si and SiO2 for VLSI by MOSLEHI, M. M, SARASWAT, K. C

“…Experimental investigations of the thermal nitridation of Si and SiO2 have led to the thermal growing of high quality, ultrathin films of silicon nitride and…”
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Analytical thermal model for multilevel VLSI interconnects incorporating via effect by Ting-Yen Chiang, Banerjee, K., Saraswat, K.C.

“…The authors present compact analytical thermal models for estimating the temperature rise of multilevel VLSI interconnect lines incorporating via effect. The…”
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Comparative Study on Electrical and Microstructural Characteristics of ZrO2 and HfO2 Grown by Atomic Layer Deposition by Kim, Hyoungsub, Saraswat, Krishna C., McIntyre, Paul C.

“…Ultra-thin ZrO2 and HfO2 dielectric films grown by atomic layer deposition (ALD) are quite promising materials for gate dielectric applications in future…”
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