Search Results - "Sakurai, Kiyofumi"

A 151-mm ^ 64-Gb 2 Bit/Cell NAND Flash Memory in 24-nm CMOS Technology by Fukuda, K., Watanabe, Y., Makino, E., Kawakami, K., Sato, J., Takagiwa, T., Kanagawa, N., Shiga, H., Tokiwa, N., Shindo, Y., Ogawa, T., Edahiro, T., Iwai, M., Nagao, O., Musha, J., Minamoto, T., Furuta, Y., Yanagidaira, K., Suzuki, Y., Nakamura, D., Hosomura, Y., Tanaka, R., Komai, H., Muramoto, M., Shikata, G., Yuminaka, A., Sakurai, K., Sakai, M., Hong Ding, Watanabe, M., Kato, Y., Miwa, T., Mak, A., Nakamichi, M., Hemink, G., Lee, D., Higashitani, M., Murphy, B., Bo Lei, Matsunaga, Y., Naruke, K., Hara, T.

“…A 64-Gb MLC (2 bit/cell) NAND flash memory with the highest memory density to date as an MLC flash memory, has been successfully developed. To decrease the…”
Get full text

A 151-mm 2 64-Gb 2 Bit/Cell NAND Flash Memory in 24-nm CMOS Technology by Fukuda, Koichi, Watanabe, Yoshihisa, Makino, Eiichi, Kawakami, Koichi, Sato, Jumpei, Takagiwa, Teruo, Kanagawa, Naoaki, Shiga, Hitoshi, Tokiwa, Naoya, Shindo, Yoshihiko, Ogawa, Takeshi, Edahiro, Toshiaki, Iwai, Makoto, Nagao, Osamu, Musha, Junji, Minamoto, Takatoshi, Furuta, Yuka, Yanagidaira, Kosuke, Suzuki, Yuya, Nakamura, Dai, Hosomura, Yoshikazu, Tanaka, Rieko, Komai, Hiromitsu, Muramoto, Mai, Shikata, Go, Yuminaka, Ayako, Sakurai, Kiyofumi, Sakai, Manabu, Ding, Hong, Watanabe, Mitsuyuki, Kato, Yosuke, Miwa, Toru, Mak, Alexander, Nakamichi, Masaru, Hemink, Gertjan, Lee, Dana, Higashitani, Masaaki, Murphy, Brian, Lei, Bo, Matsunaga, Yasuhiko, Naruke, Kiyomi, Hara, Takahiko

“…A 64-Gb MLC (2 bit/cell) NAND flash memory with the highest memory density to date as an MLC flash memory, has been successfully developed. To decrease the…”
Get full text

A 56-nm CMOS 99-mm2 8-Gb multi-level NAND flash memory with 10-MB/s program throughput by TAKEUCHI, Ken, KAMEDA, Yasushi, IWAI, Makoto, SHIRAKAWA, Masanobu, ICHIGE, Masayuki, HATAKEYAMA, Kazuo, TANAKA, Shinichi, KAMEI, Teruhiko, FU, Jia-Yi, CEMEA, Adi, YAN LI, HIGASHITAM, Masaaki, FUJIMURA, Susumu, HEMINK, Gertjan, SATO, Shinji, OOWADA, Ken, LEE, Shih-Chung, HAYASHIDA, Naoki, JUN WAN, LUTZE, Jeffrey, TSAO, Shouchang, MOFIDI, Mehrdad, SAKURAI, Kiyofumi, OTAKE, Hiroyuki, TOKIWA, Naoya, WAKI, Hiroko, NOZAWA, Yasumitsu, KANAZAWA, Kazuhisa, OHSHIMA, Shigeo, HOSONO, Koji, SHIGA, Hitoshi, WATANABE, Yoshihisa, FUTATSUYAMA, Takuya, SHINDO, Yoshihiko, KOJIMA, Masatsugu

“…[...] noise cancellation circuits and the dual VDD-line scheme realize both a small die size and a fast programming…”
Get full text

A 56-nm CMOS 99- }^ 8-Gb Multi-Level NAND Flash Memory With 10-MB/s Program Throughput by Takeuchi, K., Kameda, Y., Fujimura, S., Otake, H., Hosono, K., Shiga, H., Watanabe, Y., Futatsuyama, T., Shindo, Y., Kojima, M., Iwai, M., Shirakawa, M., Ichige, M., Hatakeyama, K., Tanaka, S., Kamei, T., Jia-Yi Fu, Cernea, A., Yan Li, Higashitani, M., Hemink, G., Sato, S., Oowada, K., Shih-Chung Lee, Hayashida, N., Jun Wan, Lutze, J., Shouchang Tsao, Mofidi, M., Sakurai, K., Tokiwa, N., Waki, H., Nozawa, Y., Kanazawa, K., Ohshima, S.

“…A single 3.3-V only, 8-Gb NAND flash memory with the smallest chip to date, 98.8 mm 2 , has been successfully developed. This is the world's first integrated…”
Get full text

A 151-mm2 64-Gb 2 Bit/Cell NAND Flash Memory in 24-nm CMOS Technology by FUKUDA, Koichi, WATANABE, Yoshihisa, OGAWA, Takeshi, EDAHIRO, Toshiaki, IWAI, Makoto, NAGAO, Osamu, MUSHA, Junji, MINAMOTO, Takatoshi, FURUTA, Yuka, YANAGIDAIRA, Kosuke, SUZUKI, Yuya, NAKAMURA, Dai, MAKINO, Eiichi, HOSOMURA, Yoshikazu, TANAKA, Rieko, KOMAI, Hiromitsu, MURAMOTO, Mai, SHIKATA, Go, YUMINAKA, Ayako, SAKURAI, Kiyofumi, SAKAI, Manabu, HONG DING, WATANABE, Mitsuyuki, KAWAKAMI, Koichi, KATO, Yosuke, MIWA, Toru, MAK, Alexander, NAKAMICHI, Masaru, HEMINK, Gertjan, LEE, Dana, HIGASHITANI, Masaaki, MURPHY, Brian, BO LEI, MATSUNAGA, Yasuhiko, SATO, Jumpei, NARUKE, Kiyomi, HARA, Takahiko, TAKAGIWA, Teruo, KANAGAWA, Naoaki, SHIGA, Hitoshi, TOKIWA, Naoya, SHINDO, Yoshihiko

Get full text

A 146-mm2 8-Gb multi-level NAND flash memory with 70-nm CMOS technology by HARA, Takahiko, FUKUDA, Koichi, TAKEUCHI, Yoshiaki, AMEMIYA, Kazumi, MOROOKA, Midori, KAMEI, Teruhiko, NASU, Hiroaki, WANG, Chi-Ming, SAKURAI, Kiyofumi, TOKIWA, Naoya, WAKI, Hiroko, MARUYAMA, Tohru, KANAZAWA, Kazuhisa, YOSHIKAWA, Susumu, HIGASHITANI, Masaaki, PHAM, Tuan D, YUPIN FONG, WATANABE, Toshiharu, SHIBATA, Noboru, HOSONO, Koji, MAEJIMA, Hiroshi, NAKAGAWA, Michio, ABE, Takumi, KOJIMA, Masatsugu, FUJIU, Masaki

Get full text

A 151mm2 64Gb MLC NAND flash memory in 24nm CMOS technology by Fukuda, K, Watanabe, Y, Makino, E, Kawakami, K, Sato, J, Takagiwa, T, Kanagawa, N, Shiga, H, Tokiwa, N, Shindo, Y, Edahiro, T, Ogawa, T, Iwai, M, Nagao, O, Musha, J, Minamoto, T, Yanagidaira, K, Suzuki, Y, Nakamura, D, Hosomura, Y, Komai, H, Furuta, Y, Muramoto, M, Tanaka, R, Shikata, G, Yuminaka, A, Sakurai, K, Sakai, M, Ding, H, Watanabe, M, Kato, Y, Miwa, T, Mak, A, Nakamichi, M, Hemink, G, Lee, D, Higashitani, M, Murphy, B, Lei, B, Matsunaga, Y, Naruke, K, Hara, T

“…NAND flash memories are now indispensable for our modern lives. The application range of the storage memory devices began with digital still cameras and has…”
Get full text

500-megabyte/s data-rate 4.5M DRAM by Kushiyama, Natsuki, Ohshima, Shigeo, Stark, Don, Noji, Hiroyuki, Sakurai, Kiyofumi, Takase, Satoru, Furuyama, Tohru, Barth, Richard M, Chan, Andy

“…In order to improve system bus band width, a novel, small-swing, synchronous bus, which is based on a block-transfer-oriented protocol, has been proposed. A…”
Get full text

A new CR-delay circuit technology for high-density and high-speed DRAMs by Watanabe, Y., Ohsawa, T., Sakurai, K., Furuyama, T.

“…The capacitance-resistance (CR) delay circuit technology assures full asynchronicity between memory cell array and peripheral circuits over a wide range of…”
Get full text

Decoded-source sense amplifier for high-density DRAMs by Okamura, J.-I., Okada, Y., Koyanagi, M., Takeuchi, Y., Yamada, M., Sakurai, K., Imada, S., Saito, S.

“…The decoded-source sense amplifier (DSSA) for high-speed, high-density DRAMs is discussed. To prevent clamping of the common-source node of the sense amplifier…”
Get full text

Decoded-source sense amplifier for high-density DRAMs by Okamura, Okada, Koyanagi, Takeuchi, Yamada, Sakurai, Imada, Saito

“…The half-VCC sensing scheme with CMOS sense amplifier is successfully used in 1Mb DRAMs[l] to reduce bitline precharge/discharge current, and is regarded as…”
Get full text