Search Results - "Saia, R.J."

Silicon carbide UV photodiodes by Brown, D.M., Downey, E.T., Ghezzo, M., Kretchmer, J.W., Saia, R.J., Liu, Y.S., Edmond, J.A., Gati, G., Pimbley, J.M., Schneider, W.E.

“…SiC photodiodes were fabricated using 6 H single-crystal wafers. These devices have excellent UV responsivity characteristics and very low dark current even at…”
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An investigation of a molybdenum gate for submicrometer CMOS by Kwasnick, R.F., Kaminsky, E.B., Frank, P.A., Franz, G.A., Saia, R.J., Polasko, K.J., Gorczya, T.B.

“…Processing issues including Mo deposition, gate etching, ion implant channeling, and integration of a Mo gate with high-temperature processing are discussed…”
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Thin film passive elements on polyimide film by Saia, R.J., Cole, H.S., Durocher, K.M., Nielsen, M.C.

“…The General Electric Research and Development Center, Schenectady, NY, has teamed with Rensselaer Polytechnic Institute (RPI), Arizona State University (ASU)…”
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Adapting multichip module foundries for MEMS packaging by Butler, J.T., Bright, V.M., Chu, P.B., Saia, R.J.

“…Methods of packaging micro-electro-mechanical systems (MEMS) using advanced multichip module (MCM) foundry processes are described. MCM packaging provides an…”
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3-D Stacking Using the GE High Density Multichip Module Technology by Saia, R.J., Wojnarowski, R.J., Fillion, R.A., Forman, G.A., Gorowitz, B.

“…To solve the interconnect and packaging problems associated with large distributed processing systems and of mass memory systems, the GE Corporate Research and…”
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Selective CVD tungsten via plugs for multilevel metallization by Brown, D.M., Gorowitz, B., Piacente, P.A., Saia, R.J., Wilson, R.H., Woodruff, D.W.

“…Use of selective metal CVD tungsten is shown to be a viable method of filling small via holes in multilevel metal integrated circuits. The method specifically…”
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