Search Results - "Sabuncuoglu Tezcan, D."
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Integrated fluidic system for bio-molecule separation
Published in 2010 Annual International Conference of the IEEE Engineering in Medicine and Biology (2010)“…An integrated fluidic system has been fabricated, capable of separating a mixture of different bio-molecules into its components. It is composed of a filter…”
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Conference Proceeding Journal Article -
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Impact of thinning and through silicon via proximity on High-k / Metal Gate first CMOS performance
Published in 2010 Symposium on VLSI Technology (01-06-2010)“…3D integration has the potential to alleviate the performance limitations that CMOS scaling is facing provided that it preserves the integrity of both front…”
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Conference Proceeding -
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Comprehensive analysis of the impact of single and arrays of through silicon vias induced stress on high-k / metal gate CMOS performance
Published in 2010 International Electron Devices Meeting (01-12-2010)“…As scaling becomes increasingly difficult, 3D integration has emerged as a viable alternative to achieve the requisite bandwidth and power efficiency…”
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Conference Proceeding -
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Design and fabrication of a biomedical Lab-on-Chip system for SNP detection in DNA
Published in 2010 International Electron Devices Meeting (01-12-2010)“…A Lab-on-Chip system is proposed, capable of SNP (Single Nucleotide Polymorphism) detection in DNA. One of the core components is an advanced filter consisting…”
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Conference Proceeding -
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A low cost uncooled infrared microbolometer focal plane array using the CMOS n-well layer
Published in Technical Digest. MEMS 2001. 14th IEEE International Conference on Micro Electro Mechanical Systems (Cat. No.01CH37090) (2001)“…This paper reports a low-cost, 256-pixel uncooled infrared microbolometer focal plane array (FPA) implemented using a 0.8 /spl mu/m CMOS process where the…”
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Conference Proceeding -
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3D integration by Cu-Cu thermo-compression bonding of extremely thinned bulk-Si die containing 10 μm pitch through-Si vias
Published in 2006 International Electron Devices Meeting (01-12-2006)“…Using standard single damascene type techniques on bulk-Si, combined on one hand with extreme wafer thinning and on the other with Cu-Cu thermo-compression…”
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Conference Proceeding -
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Electronic-photonic integration in the helios project
Published in 10th International Conference on Group IV Photonics (01-08-2013)“…Different ways of integrating of integrating photonics and electronics at the wafer level scale are reviewed: Monolithic, Back-Side, and Front-Side…”
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Conference Proceeding -
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High performance Hybrid and Monolithic Backside Thinned CMOS Imagers realized using a new integration process
Published in 2006 International Electron Devices Meeting (01-12-2006)“…Hybrid and monolithic thinned backside illuminated CMOS imagers operating at full depletion at low substrate voltages were developed. The combination of a 50…”
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Conference Proceeding -
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Die stacking using 3D-wafer level packaging copper/polymer through-si via technology and Cu/Sn interconnect bumping
Published in 2009 IEEE International Conference on 3D System Integration (01-09-2009)“…In this study, we report on the processing and the electrical characterization of a 3D-WLP TSV flow, using a polymer-isolated, Cu-filled TSV, realized on…”
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Conference Proceeding