Search Results - "Sabuncuoglu Tezcan, D."

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  1. 1

    Integrated fluidic system for bio-molecule separation by Hiraoka, M, Fiorini, P, Zhang, L, De Malsche, W, Majeed, B, Tezcan, D Sabuncuoglu, Desmet, G, Yamashita, I, Van Hoof, C, Op de Beeck, M

    “…An integrated fluidic system has been fabricated, capable of separating a mixture of different bio-molecules into its components. It is composed of a filter…”
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    Conference Proceeding Journal Article
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    Design and fabrication of a biomedical Lab-on-Chip system for SNP detection in DNA by op de Beeck, M, De Malsche, W, Hiraoka, M, Fiorini, P, Zhang, L, op de Beeck, J, Majeed, B, Tanaka, H, Sabuncuoglu Tezcan, Deniz, Desmet, G, Ueda, D, Van Hoof, C, Yamashita, I

    “…A Lab-on-Chip system is proposed, capable of SNP (Single Nucleotide Polymorphism) detection in DNA. One of the core components is an advanced filter consisting…”
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    Conference Proceeding
  5. 5

    A low cost uncooled infrared microbolometer focal plane array using the CMOS n-well layer by Sabuncuoglu Tezcan, D., Eminoglu, S., Sevket Akar, O., Akin, T.

    “…This paper reports a low-cost, 256-pixel uncooled infrared microbolometer focal plane array (FPA) implemented using a 0.8 /spl mu/m CMOS process where the…”
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    Conference Proceeding
  6. 6

    3D integration by Cu-Cu thermo-compression bonding of extremely thinned bulk-Si die containing 10 μm pitch through-Si vias by Swinnen, B., Ruythooren, W., De Moor, P., Bogaerts, L., Carbonell, L., De Munck, K., Eyckens, B., Stoukatch, S., Tezcan, D.S., Tokei, Z., Vaes, J., Van Aelst, J., Beyne, E.

    “…Using standard single damascene type techniques on bulk-Si, combined on one hand with extreme wafer thinning and on the other with Cu-Cu thermo-compression…”
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    Conference Proceeding
  7. 7

    Electronic-photonic integration in the helios project by Fedeli, J. M., Schrank, F., Bogaerts, W., Masood, A., Zimmermann, L., Augendre, E., Bernabe, S., Kraft, J., Van Olmen, J., Sabuncuoglu Tezcan, D., Grosse, P., Enot, T.

    “…Different ways of integrating of integrating photonics and electronics at the wafer level scale are reviewed: Monolithic, Back-Side, and Front-Side…”
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    Conference Proceeding
  8. 8

    High performance Hybrid and Monolithic Backside Thinned CMOS Imagers realized using a new integration process by De Munck, K., Sabuncuoglu Tezcan, D., Borgers, T., Ruythooren, W., De Moor, P., Sedky, S., Toccafondi, C., Bogaerts, J., Van Hoof, C.

    “…Hybrid and monolithic thinned backside illuminated CMOS imagers operating at full depletion at low substrate voltages were developed. The combination of a 50…”
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    Conference Proceeding
  9. 9

    Die stacking using 3D-wafer level packaging copper/polymer through-si via technology and Cu/Sn interconnect bumping by Civale, Y., Tezcan, D.S., Philipsen, H.G.G., Jaenen, P., Agarwal, R., Duval, F., Soussan, P., Travaly, Y., Beyne, E.

    “…In this study, we report on the processing and the electrical characterization of a 3D-WLP TSV flow, using a polymer-isolated, Cu-filled TSV, realized on…”
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    Conference Proceeding