Search Results - "SOUTHWICK, R. G"

A Physical Model of the Temperature Dependence of the Current Through SiO2/HfO2 Stacks by VANDELLI, L, PADOVANI, A, LARCHER, L, SOUTHWICK, R. G, KNOWLTON, W. B, BERSUKER, G

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Impact of single pMOSFET dielectric degradation on NAND circuit performance by Estrada, D., Ogas, M.L., Southwick, R.G., Price, P.M., Baker, R.J., Knowlton, W.B.

“…Degradation of CMOS NAND logic circuits resulting from dielectric degradation of a single pMOSFET using constant voltage stress has been examined by means of a…”
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Selective Enablement of Dual Dipoles for near Bandedge Multi-Vt Solution in High Performance FinFET and Nanosheet Technologies by Bao, R., Watanabe, K., Zhang, J., Zhou, H., Sankarapandian, M., Li, J., Pancharatnam, S., Jamison, P., Southwick, R. G, Wang, M., Demarest, J. J, Guo, J., Loubet, N., Basker, V., Guo, D., Narayanan, V., Haran, B., Bu, H., Khare, M.

“…We report that n-dipole and p-dipole (dual dipoles) can be co-integrated to provide a more flexible volumeless multiple threshold voltage(multi-Vt) solution in…”
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On the “U-shaped” continuum of band edge states at the Si/SiO2 interface by Ryan, J. T., Southwick, R. G., Campbell, J. P., Cheung, K. P., Young, C. D., Suehle, J. S.

“…The historical and near universal acceptance that a U-shaped continuum of band edge states intrinsically exists at the Si/SiO2 boundary is re-examined. Using a…”
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A Physical Model of the Temperature Dependence of the Current Through \hbox\hbox\hbox Stacks by Vandelli, L., Padovani, A., Larcher, L., Southwick, R. G., Knowlton, W. B., Bersuker, G.

“…In this paper, we investigate the characteristics of the defects responsible for the leakage current in the SiO 2 and SiO 2 /HfO 2 gate dielectric stacks in a…”
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Selective GeOx-scavenging from interfacial layer on Si1−xGex channel for high mobility Si/Si1−xGex CMOS application by Lee, C. H., Kim, H., Jamison, P., Southwick, R. G., Mochizuki, S., Watanabe, K., Bao, R., Galatage, R., Guillaumet, S., Ando, T., Pandey, R., Konar, A., Lherron, B., Fronheiser, J., Siddiqui, S., Jagannathan, H., Paruchuri, V.

“…We demonstrate a technique for selective GeO x -scavenging which creates a GeO x -free IL on Si 1-x Ge x substrates. This process reduces N it by >60% to 2e11…”
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Modeling temperature dependency (6 - 400K) of the leakage current through the SiO2/high-K stacks by Vandelli, L, Padovani, A, Larcher, L, Southwick, R G, Knowlton, W B, Bersuker, G

“…We investigate the mechanism of the gate leakage current in the Si/SiO 2 /HfO 2 /TiN stacks in a wide temperature range (6 - 400 K) by simulating the electron…”
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Hardware Based Performance Assessment of Vertical-Transport Nanosheet Technology by Tsutsui, G., Song, S., Strane, J., Xie, R., Qin, L., Zhang, C., Schmidt, D., Fan, S., Hong, B., Jung, Y., Sohn, C-W., Hwang, I., Yim, J., Son, G. H., Jo, G., Kim, K-I., Sankarapandian, M., Mochizuki, S., Seshadri, I., Miller, E., Li, J., Demarest, J., Waskiewicz, C., Southwick, R. G., Zhou, H., Pujari, R. N., Nieves, P., Wang, M., Jagannathan, H., Anderson, B., Guo, D., Divakaruni, R., Wu, T., Seo, K-I., Bu, H.

“…Vertical-transport FET (VTFET) is a strong candidate for future CMOS technology. The concept of VTFET has been demonstrated in our previous report, which…”
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Time dependent dielectric breakdown of SiN, SiBCN and SiOCN spacer dielectrics by Southwick, R. G., Wu, E., Mehta, S., Stathis, J. H.

“…The dielectric breakdown of SiN, SiBCN, and SiOCN MOSFET spacer dielectrics are studied. Using the Self-Consistent-Acceleration-Poisson-Statistics (SCAPS)…”
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SiGe Channel CMOS: Understanding Dielectric Breakdown and Bias Temperature Instability Tradeoffs by Southwick, R. G., Wang, M., Mochizuki, S., Miao, X., Li, J., Lee, C. H.

“…Breakdown and bias temperature instability for n/pFETs are studied on a wide composition of SiGe channels on different strain relaxation buffers. This study…”
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Time Dependent Dielectric Breakdown of Cobalt and Ruthenium Interconnects at 36nm Pitch by Huang, H., McLaughin, P. S., Kelly, J. J., Yang, C. -C., Southwick, R. G., Wang, M., Bonilla, G., Karve, G.

“…Time dependent dielectric breakdown (TDDB) properties of cobalt and ruthenium interconnects were investigated in 36 nm pitch dual damascene test vehicles. We…”
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Differentiated Performance and Reliability Enabled by Multi-Work Function Solution in RMG Silicon and SiGe MOSFETs by Bao, R., Southwick, R. G., Zhou, H., Lee, C. H., Linder, B. P., Ando, T., Guo, D., Jagannathan, H., Narayanan, V.

“…We report for the first time that replacement metal gate (RMG) work function metal (WFM) modulates the interface defects in Silicon and SiGe MOSFETs. Changing…”
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Understanding the interfacial layer formation on strained Si1−xGex channels and their correlation to inversion layer hole mobility by Lee, C. H., Southwick, R. G., Bao, R., Mochizuki, S., Paruchuri, V., Jagannathan, H.

“…We investigate the mechanism of interfacial layer formation on Si 1-x Ge x (0 <; x <; 0.5) channel and its correlation to hole mobility. It is found that the…”
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A Physical Model of the Temperature Dependence of the Current Through [Formula Omitted] Stacks by Vandelli, L, Padovani, A, Larcher, L, Southwick, R. G, Knowlton, W. B, Bersuker, G

“…In this paper, we investigate the characteristics of the defects responsible for the leakage current in the [Formula Omitted] and [Formula Omitted] gate…”
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A Physical Model of the Temperature Dependence of the Current Through hbox SiO 2 hbox / hbox HfO 2 Stacks by Vandelli, L, Padovani, A, Larcher, L, Southwick, R G, Knowlton, W B, Bersuker, G

“…In this paper, we investigate the characteristics of the defects responsible for the leakage current in the hbox SiO 2 and hbox SiO 2 hbox / break hbox HfO 2…”
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On the "U-shaped" continuum of band edge states at the Si/SiO 2 interface by Ryan, J. T., Southwick, R. G., Campbell, J. P., Cheung, K. P., Young, C. D., Suehle, J. S.

“…The historical and near universal acceptance that a U-shaped continuum of band edge states intrinsically exists at the Si/SiO 2 boundary is re-examined. Using…”
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SiGe composition and thickness effects on NBTI in replacement metal gate / high-κ technologies by Srinivasan, P., Fronheiser, J., Akarvardar, K., Kerber, A., Edge, L. F., Southwick, R. G., Cartier, E., Kothari, H.

“…The dependence of NBTI on SiGe thickness and composition for epitaxially grown layers on (100) and (110) Si substrates is studied in detail. It is found that…”
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NBTI in Si0.5Ge0.5 RMG gate stacks - Effect of high-k nitridation by Srinivasan, P., Fronheiser, J., Siddiqui, S., Kerber, A., Edge, L. F., Southwick, R. G., Cartier, E.

“…Negative Bias Temperature Instability (NBTI) is assessed in (100)Si planar cSi 0.5 Ge 0.5 Replacement Metal Gate (RMG) gate stacks, with and without high-k…”
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On the Contribution of Bulk Defects on Charge Pumping Current by Ryan, J. T., Southwick, R. G., Campbell, J. P., Cheung, K. P., Suehle, J. S.

“…Frequency-dependent charge pumping (CP) (FD-CP) has emerged as a popular technique for studying the spatial and energetic distribution of defect centers in…”
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Survey of oxide degradation in inverter circuits using 2.0 nm MOS devices by Ogas, M.L., Southwick, R.G., Cheek, B.J., Baker, R.J., Bersuker, G., Knowlton, W.B.

“…Degradation in CMOS inverter circuit performance as a result of gate oxide wearout in 2.0 nm pMOSFETs was investigated using a constant voltage stress (CVS)…”
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