Search Results - "SORSCH, T"

The electronic structure at the atomic scale of ultrathin gate oxides by Muller, D. A, Sorsch, T, Moccio, S, Baumann, F. H, Evans-Lutterodt, K, Timp, G

“…The narrowest feature on present-day integrated circuits is the gate oxide-the thin dielectric layer that forms the basis of field-effect device structures…”
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Multi-component high- K gate dielectrics for the silicon industry by Manchanda, L, Morris, M.D, Green, M.L, van Dover, R.B, Klemens, F, Sorsch, T.W, Silverman, P.J, Wilk, G, Busch, B, Aravamudhan, S

“…The exponential growth of the silicon industry can be attributed to that fact that silicon has a native oxide that is silicon dioxide. With SiO 2 soon…”
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Tunneling into interface states as reliability monitor for ultrathin oxides by Ghetti, A., Sangiorgi, E., Bude, J., Sorsch, T.W., Weber, G.

“…This paper reports experimental data and simulations of low-voltage tunneling in ultrathin oxide MOS devices. When the substrate is very heavily doped, a…”
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MEMS thermal imager with optical readout by Jones, C.D.W., Bolle, C.A., Ryf, R., Simon, M.E., Pardo, F., Aksyuk, V.A., Lai, W.Y.-C., Bower, J.E., Miner, J.F., Klemens, F.P., Cirelli, R.A., Sorsch, T.W., Ferry, E.J., Fetter, L.A., Pai, C.-S., Taylor, J.A., Vyas, B., Watson, G.P., Stekas, B., Baker, M.R., Papazian, A.R., Basavanhally, N.R., Mansfield, W.M., Kornblit, A., Keller, R.C., Gates, J.V., Ramirez, A.P.

“…A cantilever-based uncooled IR imager was developed utilizing a novel optical readout scheme based on inter-pixel interference. A series of small arrays…”
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Small-signal performance and modeling of sub-50 nm nMOSFETs with fT above 460-GHz by DIMITROV, V, HENG, J. B, KORNBLIT, A, KLEMENS, F, BOWER, J, CIRELLI, R, FERRY, E. J, TAYLOR, A, FENG, M, TIMP, G, TIMP, K, DIMAURO, O, CHAN, R, HAFEZ, M, FENG, J, SORSCH, T, MANSFIELD, W, MINER, J

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Flexible fabrication of large pixel count piston-tip-tilt mirror arrays for fast spatial light modulators by Pardo, Flavio, Cirelli, R.A., Ferry, E.J., Lai, W.Y.-C., Klemens, F.P., Miner, J.F., Pai, C.S., Bower, J.E., Mansfield, W.M., Kornblit, A., Sorsch, T.W., Taylor, J.A., Baker, M.R., Fullowan, R., Simon, M.E., Aksyuk, V.A., Ryf, R., Dyson, H., Arney, S.

“…We present arrays of electrostatically actuated piston-tip-tilt micromirrors realized using a surface micromachining 3-structural-layer polysilicon process…”
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Beyond the gene chip by Heng, Jiunn Benjamin, Aksimentiev, Aleksei, Ho, Chuen, Dimitrov, Valentin, Sorsch, Thomas W., Miner, John F., Mansfield, William M., Schulten, Klaus, Timp, Gregory

“…We describe a prospective strategy for reading the encyclopedic information encoded in the genome: using a nanopore in a membrane formed from a metal-oxide…”
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Rapid thermal processing of silicon wafers with emissivity patterns by RABUS, M, FIORY, A. T, MANSFIELD, W, RAVINDRA, N. M, FRISELLA, P, AGARWAL, A, SORSCH, T, MINER, J, FERRY, E, KLEMENS, F, CIRELLI, R

“…Fabrication of devices and circuits on silicon wafers creates patterns in optical properties, particularly the thermal emissivity and absorptivity, that lead…”
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Understanding the limits of ultrathin SiO2 and Si-O-N gate dielectrics for sub-50 nm CMOS by GREEN, M. L, SORSCH, T. W, TIMP, G. L, MULLER, D. A, WEIR, B. E, SILVERMAN, P. J, MOCCIO, S. V, KIM, Y. O

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The role of native traps on the tunneling characteristics of ultra-thin (1.5–3 nm) oxides by Ghetti, A., Sangiorgi, E., Sorsch, T.W., Kizilyalli, I.

“…In this paper we report experiments and simulations on thin oxide (1.5–3 nm) MOS devices, showing that native traps can play a dominant role in the tunneling…”
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Ultra-thin gate oxide reliability projections by Weir, B.E., Alam, M.A., Silverman, P.J., Baumann, F., Monroe, D., Bude, J.D., Timp, G.L., Hamad, A., Ma, Y., Brown, M.M., Hwang, D., Sorsch, T.W., Ghetti, A., Wilk, G.D.

“…We describe the reliability projection methods currently used and show that 1.6 nm oxides are sufficiently reliable even if soft breakdown is considered the…”
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Oxidation of Si beneath thin SiO2 layers during exposure to HBr/O2 plasmas, investigated by vacuum transfer x-ray photoelectron spectroscopy by Donnelly, V. M., Klemens, F. P., Sorsch, T. W., Timp, G. L., Baumann, F. H.

“…Thin SiO2 layers were exposed to an HBr/O2 plasma for a variety of short periods, reproducing the over-etching process after polycrystalline Si gate electrodes…”
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Monolithic fringe-field-activated crystalline silicon tilting-mirror devices by Greywall, D.S., Chien-Shing Pai, Sang-Hyun Oh, Chorng-Ping Chang, Marom, D.M., Busch, P.A., Cirelli, R.A., Taylor, J.A., Klemens, F.P., Sorsch, T.W., Bower, J.E., Lai, W.Y.-C., Soh, H.T.

“…A new approach is presented for fabricating monolithic crystalline silicon tilting-mirror microoptoelectromechanical systems (MOEMS) devices. The activation…”
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The relentless march of the MOSFET gate oxide thickness to zero by Timp, G, Bude, J, Baumann, F, Bourdelle, K.K, Boone, T, Garno, J, Ghetti, A, Green, M, Gossmann, H, Kim, Y, Kleiman, R, Kornblit, A, Klemens, F, Moccio, S, Muller, D, Rosamilia, J, Silverman, P, Sorsch, T, Timp, W, Tennant, D, Tung, R, Weir, B

“…The narrowest feature of an integrated circuit is the silicon dioxide gate dielectric (3–5 nm). The viability of future CMOS technology is contingent upon…”
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Progress toward a 30 nm silicon metal–oxide–semiconductor gate technology by Tennant, D. M., Timp, G. L., Ocola, L. E., Green, M., Sorsch, T., Kornblit, A., Klemens, F., Kleiman, R., Kim, Y., Timp, W.

“…We report on progress toward scaling both N-metal–oxide–semiconductor (MOS) and P-metal–oxide–semiconductor MOS transistors to a gate length of 30 nm. We…”
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COM2 enhanced graded base SiGe technology for high speed applications by Ivanov, T., Shive, S., Esry, T., Lee, C., Johnson, R., Sorsch, T., Banoo, K., Smith, P., Carroll, M., Moinian, S., Mastrapasqua, M., Frei, A., Chen, A., King, C., Hamad, A., Martin, E.

“…The COM2 enhanced graded base SiGe modular BiCMOS technology has been developed. It is based on the COM2 digital CMOS process. The technology achieves peak…”
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COM2 enhanced graded base SiGe technology for high speed applications by Ivanov, T., Shive, S., Esry, T., Lee, C., Johnson, R., Sorsch, T., Banoo, K., Smith, P., Cochran, W., Carroll, M., Moinian, S., Mastrapasqua, M., Frei, A., Chen, A., King, C., Hamad, A., Martin, E.

“…The COM2 Enhanced Graded Base SiGe modular BiCMOS technology has been developed. It is based on the COM2 digital CMOS process. The technology achieves peak…”
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High-Density Solder Bump Interconnect for MEMS Hybrid Integration by Basavanhally, N., Lopez, D., Aksyuk, V., Ramsey, D., Bower, E., Cirelli, R., Ferry, E., Frahm, R., Gates, J., Klemens, F., Lai, W., Low Yee, Mansfield, W., Chien-Shing Pai, Papazian, R., Pardo, F., Sorsch, T., Watson, P.

“…An ultra high-density hybrid integration for micro-electromechanical system (MEMS) mirror chips with several thousand inputs/outputs has been developed. The…”
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A novel, aerosol-nanocrystal floating-gate device for non-volatile memory applications by De Blauwe, J., Ostraat, M., Green, M.L., Weber, G., Sorsch, T., Kerber, A., Klemens, F., Cirelli, R., Ferry, E., Grazul, J.L., Baumann, F., Kim, Y., Mansfield, W., Bude, J., Lee, J.T.C., Hillenius, S.J., Flagan, R.C., Atwater, H.A.

“…This paper describes the fabrication, and structural and electrical characterization of a new, aerosol-nanocrystal floating-gate FET, aimed at non-volatile…”
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Monolithic MEMS optical switch with amplified out-of-plane angular motion by Lopez, D., Simon, M.E., Pardo, F., Aksyuk, V., Klemens, F., Cirelli, R., Neilson, D.T., Shea, H., Sorsch, T., Ferry, E., Nalamasu, O., Gammel, P.L.

“…We describe an array of electrostatically actuated surface micromachined mirrors for fiber-optic switching. Using a pure flexure angle amplification mechanism…”
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